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On Sat, Jul 23, 2011 at 3:57 PM, H.J. Lu <hjl.tools@gmail.com> wrote: >>> This patch adds x32 LEA insn support. ?The main issue is >>> >>> gen_lowpart (Pmode, operands[1]); >>> >>> doesn't work on symbol. ?This patch avoids it. >>> >>> Also we shouldn't generate 32bit store with x32 PIC source. >>> >>> Any comments? You are not fixing the core of the problem... this is why you need so much hacks and kludges at various places (some w.r.t. -fPIC already existed, see the patch). Above, you correctly identified the problem, so let's avoid gen_lowpart on SImode operands by not calling it anymore. Attached patch effectively rewrites LEA handling. The trick is, that instead of using Pmode operations in addresses, we use either SImode or DImode operations to calculate the address on 64bit targets. Up to now, address calculations strictly used Pmode, so SImode on 32bit targets and DImode on 64bit targets. Recent patches to ix86_decompose_address and ix86_legitimate_address_p relaxed this requirement. Attached patch changes LEA patterns and LEA splitters to accept addresses, calculated with either SImode or DImode operations.This means, that on x64 targets, we don't use gen_lowpart on SImode operands anymore. Since symbol references on x32 are in SImode, this solves the problem. The patch also avoids generating SImode subregs of DImode addresses and DImode zero_extends of SImode addresses, since LEA insn does this for us automatically. Please also note the change to ix86_print_operand_address. To avoid addr32 prefixes, we can force registers in DImode on 64bit targets without any problems. On x32, we can investigate, if this change avoids unnecessary LEAs (for PR 49781, patched gcc genrates 6 vs. 8). Also, we can investigate the effect of addr32 on benchmarks. Patched gcc also fixes all testcases from PR 47381. 2011-07-24 Uros Bizjak <ubizjak@gmail.com> PR target/47381 * config/i386/i386.md (*lea_1): Use SWI48 mode iterator. (*lea_1_zext): New insn pattern. (add->lea splitter): Check operand modes in insn constraint. Extend operands less than SImode wide to SImode. (add->lea zext splitter): Do not extend operands to DImode. (*lea_general_1): Handle only QImode and HImode operands. (*lea_general_2): Ditto. (*lea_general_3): Ditto. (*lea_general_1_zext): Remove. (*lea_general_2_zext): Ditto. (*lea_general_3_zext): Ditto. (*lea_general_4): Check operand modes in insn constraint. Extend operands less than SImode wide to SImode. (ashift->lea splitter): Ditto. * config/i386/i386.md (ix86_print_operand_address): Print address registers with 'q' modifier on 64bit targets. Patch was bootstrapped and regression tested on x86_64-pc-linux-gnu {,-m32} with no regressions. H.J., can you please test it on x32? BTW: -fPIC is not yet implemented on trunk and still fails there with an (unrelated) error, I didn't check x32 branch. Uros.
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