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Re: RFA; MN10300: Fix AM33 clzsi2 pattern
- From: Nick Clifton <nickc at redhat dot com>
- To: Richard Henderson <rth at redhat dot com>
- Cc: aoliva at redhat dot com, law at redhat dot com, gcc-patches at gcc dot gnu dot org
- Date: Sun, 26 Jun 2011 05:29:54 +0100
- Subject: Re: RFA; MN10300: Fix AM33 clzsi2 pattern
- References: <m34o3eb9za.fsf@redhat.com> <4E061484.50307@redhat.com>
Hi Richard,
The clzsi2/bsch patterns in the MN10300 backend do not work. There
are two problems - firstly the starting bit-search position for the
BSCH instruction is not set.
Yes it is. What do you think that "unused" second operand does?
That actually works ? Gross!
Secondly the BSCH instruction returns
the bit position of the highest set bit, not the number of leading
zeros.
Ah, I do see that. I recommend you put the xor in the clz expander
rather than cluttering up the "bsch" pattern.
OK - revised patch attached. Is this version OK to apply ?
Cheers
Nick
gcc/ChangeLog
2011-06-26 Nick Clifton <nickc@redhat.com>
* mn10300.md (clzsi2): Use XOR after BSCH to convert bit position
of highest bit set into a count of the high zero bits.
Index: gcc/config/mn10300/mn10300.md
===================================================================
--- gcc/config/mn10300/mn10300.md (revision 175395)
+++ gcc/config/mn10300/mn10300.md (working copy)
@@ -1811,10 +1811,24 @@
;; MISCELANEOUS
;; ----------------------------------------------------------------------
+;; Note the use of the (const_int 0) when generating the insn that matches
+;; the bsch pattern. This ensures that the destination register is
+;; initialised with 0 which will make the BSCH instruction set searching
+;; at bit 31.
+;;
+;; The XOR in the instruction sequence below is there because the BSCH
+;; instruction returns the bit number of the highest set bit and we want
+;; the number of zero bits above that bit. The AM33 does not have a
+;; reverse subtraction instruction, but we can use a simple xor instead
+;; since we know that the top 27 bits are clear.
(define_expand "clzsi2"
- [(parallel [(set (match_operand:SI 0 "register_operand" "")
- (unspec:SI [(match_operand:SI 1 "register_operand" "")
+ [(parallel [(set (match_operand:SI 0 "register_operand")
+ (unspec:SI [(match_operand:SI 1 "register_operand")
(const_int 0)] UNSPEC_BSCH))
+ (clobber (reg:CC CC_REG))])
+ (parallel [(set (match_dup 0)
+ (xor:SI (match_dup 0)
+ (const_int 31)))
(clobber (reg:CC CC_REG))])]
"TARGET_AM33"
)