Index: i386.md =================================================================== --- i386.md (revision 171163) +++ i386.md (working copy) @@ -4959,18 +4959,18 @@ && !X87_ENABLE_FLOAT (mode, mode)) { rtx reg = gen_reg_rtx (XFmode); - rtx insn; + rtx (*insn)(rtx, rtx); emit_insn (gen_floatxf2 (reg, operands[1])); if (mode == SFmode) - insn = gen_truncxfsf2 (operands[0], reg); + insn = gen_truncxfsf2; else if (mode == DFmode) - insn = gen_truncxfdf2 (operands[0], reg); + insn = gen_truncxfdf2; else gcc_unreachable (); - emit_insn (insn); + emit_insn (insn (operands[0], reg)); DONE; } }) @@ -18216,10 +18216,13 @@ (unspec_volatile [(const_int 0)] UNSPECV_SLWP_INTRINSIC))] "TARGET_LWP" { - if (TARGET_64BIT) - emit_insn (gen_lwp_slwpcbdi (operands[0])); - else - emit_insn (gen_lwp_slwpcbsi (operands[0])); + rtx (*insn)(rtx); + + insn = (TARGET_64BIT + ? gen_lwp_slwpcbdi + : gen_lwp_slwpcbsi); + + emit_insn (insn (operands[0])); DONE; }) Index: sse.md =================================================================== --- sse.md (revision 171163) +++ sse.md (working copy) @@ -4122,17 +4122,21 @@ (match_operand:SI 2 "const_0_to_1_operand" "")] "TARGET_AVX" { + rtx (*insn)(rtx, rtx); + switch (INTVAL (operands[2])) { case 0: - emit_insn (gen_vec_extract_lo_ (operands[0], operands[1])); + insn = gen_vec_extract_lo_; break; case 1: - emit_insn (gen_vec_extract_hi_ (operands[0], operands[1])); + insn = gen_vec_extract_hi_; break; default: gcc_unreachable (); } + + emit_insn (insn (operands[0], operands[1])); DONE; }) @@ -11776,19 +11780,21 @@ (match_operand:SI 3 "const_0_to_1_operand" "")] "TARGET_AVX" { + rtx (*insn)(rtx, rtx, rtx); + switch (INTVAL (operands[3])) { case 0: - emit_insn (gen_vec_set_lo_ (operands[0], operands[1], - operands[2])); + insn = gen_vec_set_lo_; break; case 1: - emit_insn (gen_vec_set_hi_ (operands[0], operands[1], - operands[2])); + insn = gen_vec_set_hi_; break; default: gcc_unreachable (); } + + emit_insn (insn (operands[0], operands[1], operands[2])); DONE; })