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Re: RFA: MN10300: Add support for LIW instructions


On 01/27/2011 03:25 AM, Nick Clifton wrote:
> +liw_candidate (rtx insn)
> +{
> +  rtx p;
> +
> +  if (insn == NULL || ! INSN_P (insn) || DEBUG_INSN_P (insn))
> +    return false;
> +
> +  p = PATTERN (insn);
> +  if (GET_CODE (p) == PARALLEL
> +      && GET_CODE (XVECEXP (p, 0, 1)) == CLOBBER)
> +    p = XVECEXP (p, 0, 0);
> +
> +  return GET_CODE (p) == SET;
> +}

That last part looks like

  single_set (insn) != NULL.

Otoh, isn't

  get_attr_liw (insn) != LIW_BOTH

or some such an even better quick test?

> +      insn2 = NEXT_INSN (r);
> +      /* Do not let line number notes prevent this optimization,
> +	 as otherwise the code produce with "-g" enabled will be different
> +	 from the code produced without "-g".  */
> +      if (GET_CODE (insn2) == NOTE
> +	  && NOTE_KIND (insn2) > 0
> +	  && NEXT_INSN (insn2) != NULL)
> +	insn2 = NEXT_INSN (insn2);

  insn2 = next_nonnote_nondebug_insn (r)

> +extract_bundle (rtx insn, rtx * ops, enum attr_liw_op * plop, bool ops1_post_inc)
> +{
> +  enum attr_liw_op lop;
> +  rtx p, s;
> +
> +  p = PATTERN (insn);
> +  if (GET_CODE (p) == PARALLEL
> +      && GET_CODE (XVECEXP (p, 0, 1)) == CLOBBER)
> +    p = XVECEXP (p, 0, 0);

Another single_set.

> +(define_insn "liw"
> +  [(unspec [(match_operand 0 "" "")
> +	    (match_operand 1 "" "")
> +	    (match_operand 2 "" "")
> +	    (match_operand 3 "" "")
> +	    (match_operand 4 "" "")
> +	    ] UNSPEC_LIW)]
> +  "TARGET_ALLOW_LIW"
> +  "%W0 %2, %1, %4, %3"
> +  [(set (attr "timings") (if_then_else (eq_attr "cpu" "am34")
> +				       (const_int 13) (const_int 12)))]
> +)

This is incorrect representation of the rtl.  You're modifying op1 and op3.
A better representation would be

(define_insn "liw"
  [(set (match_operand:SI 0 "register_operand" "=r")
	(unspec:SI [(match_dup 0)
                    (match_operand:SI 2 "register_operand" "r")
                    (match_operand:SI 4 "const_int_operand" "")]
                   UNSPEC_LIW))
   (set (match_operand:SI 1 "register_operand" "=r")
        (unspec:SI [(match_dup 1)
                    (match_operand:SI 3 "register_operand" "r")
                    (match_operand:SI 5 "const_int_operand" "")]
                   UNSPEC_LIW))]
  "TARGET_ALLOW_LIW"
  "%W4_%W5 %2,%0,%3,%1"
)

Of course, this exact form only works for the non-compare liw insns.
To include compares, you'd need a (reg:CC CC_REG) dest, without the
match_dup.


r~


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