[PATCH RFC] Doloop pattern for ARM

[Revital1 Eres <ERES at il dot ibm dot com>]

Hello,

The attached patch models doloop pattern for ARM.
I followed Chung-Lin Tang's suggestion to use
subs+bne sequence.
The patch is also fixed according to comments I
received when posting an initial version of it
to gcc@.

Bootstrap and regtest on ppc64-redhat-linux with SMS flags.
On SPU and ARM regtested on c,c++ and fortran.

On EEMBC/telecom/autcor benchmark I see 19% improvements
running on cortex-a9 with the following flags:
 -O3 -mcpu=cortex-a9  -mtune=cortex-a9  -funsafe-loop-optimizations
-fmodulo-sched

and 27% improvements when running with:
-O3 -mcpu=cortex-a9  -mtune=cortex-a9  -funsafe-loop-optimizations  -mthumb
-fmodulo-sched

Thanks,
Revital


ChangeLog:

        * modulo-sched.c (sms_schedule): Support new form of doloop pattern
        * loop-doloop.c (doloop_condition_get): Likewise.
        * config/arm/thumb2.md (*thumb2_addsi3_compare0): Remove "*".
        (doloop_end): New.
        * config/arm/arm.md (*addsi3_compare0): Remove "*".


(See attached file: patch_doloop_arm_23.txt)

Attachment: patch_doloop_arm_23.txt
Description: Text document