Committed: Fix PR target/46881

[Joern Rennecke <amylaar at spamcop dot net>]

Cross-built on x86_64-pc-linux-gnu.

Committed as obvious.
2010-12-10  Joern Rennecke  <amylaar@spamcop.net>

	PR target/46881
	* doc/tm.texi: Regenerate.
	* target.def: Fix "preferred" spelling.  Refer to rclass by its
	exact name.
	* config/arm/arm.c (arm_preferred_rename_class): Rename parameter class
	to rclass.

Index: doc/tm.texi
===================================================================
--- doc/tm.texi	(revision 167677)
+++ doc/tm.texi	(working copy)
@@ -2505,7 +2505,7 @@ @defmac REGNO_OK_FOR_INDEX_P (@var{num})
 @end defmac
 
 @deftypefn {Target Hook} reg_class_t TARGET_PREFERRED_RENAME_CLASS (reg_class_t @var{rclass})
-A target hook that places additional preference on the register class to use when it is necessary to rename a register in class @var{class} to another class, or perhaps @var{NO_REGS}, if no prefered register class is found or hook @code{preferred_rename_class} is not implemented. Sometimes returning a more restrictive class makes better code.  For example, on ARM, thumb-2 instructions using @code{LO_REGS} may be smaller than instructions using @code{GENERIC_REGS}.  By returning @code{LO_REGS} from @code{preferred_rename_class}, code size can be reduced.
+A target hook that places additional preference on the register class to use when it is necessary to rename a register in class @var{rclass} to another class, or perhaps @var{NO_REGS}, if no preferred register class is found or hook @code{preferred_rename_class} is not implemented. Sometimes returning a more restrictive class makes better code.  For example, on ARM, thumb-2 instructions using @code{LO_REGS} may be smaller than instructions using @code{GENERIC_REGS}.  By returning @code{LO_REGS} from @code{preferred_rename_class}, code size can be reduced.
 @end deftypefn
 
 @deftypefn {Target Hook} reg_class_t TARGET_PREFERRED_RELOAD_CLASS (rtx @var{x}, reg_class_t @var{rclass})
Index: target.def
===================================================================
--- target.def	(revision 167677)
+++ target.def	(working copy)
@@ -2228,8 +2228,8 @@ HOOK_VECTOR_END (calls)
 (preferred_rename_class,
  "A target hook that places additional preference on the register\
  class to use when it is necessary to rename a register in class\
- @var{class} to another class, or perhaps @var{NO_REGS}, if no\
- prefered register class is found or hook @code{preferred_rename_class}\
+ @var{rclass} to another class, or perhaps @var{NO_REGS}, if no\
+ preferred register class is found or hook @code{preferred_rename_class}\
  is not implemented.\
  Sometimes returning a more restrictive class makes better code.  For\
  example, on ARM, thumb-2 instructions using @code{LO_REGS} may be\
Index: config/arm/arm.c
===================================================================
--- config/arm/arm.c	(revision 167677)
+++ config/arm/arm.c	(working copy)
@@ -248,7 +248,7 @@ static bool arm_builtin_support_vector_m
 						     int misalignment,
 						     bool is_packed);
 static void arm_conditional_register_usage (void);
-static reg_class_t arm_preferred_rename_class (reg_class_t class);
+static reg_class_t arm_preferred_rename_class (reg_class_t rclass);
 
 
 /* Table of machine attributes.  */
@@ -23473,12 +23473,12 @@ arm_conditional_register_usage (void)
 }
 
 static reg_class_t
-arm_preferred_rename_class (reg_class_t class)
+arm_preferred_rename_class (reg_class_t rclass)
 {
   /* Thumb-2 instructions using LO_REGS may be smaller than instructions
      using GENERIC_REGS.  During register rename pass, we prefer LO_REGS,
      and code size can be reduced.  */
-  if (TARGET_THUMB2 && class == GENERAL_REGS)
+  if (TARGET_THUMB2 && rclass == GENERAL_REGS)
     return LO_REGS;
   else
     return NO_REGS;