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RFA: Fix m32c --enable-werror-always build
- From: Joern Rennecke <amylaar at spamcop dot net>
- To: gcc-patches at gcc dot gnu dot org
- Cc: DJ Delorie <dj at redhat dot com>
- Date: Fri, 05 Nov 2010 09:58:21 -0400
- Subject: RFA: Fix m32c --enable-werror-always build
These are the patches to make "make all-gcc" succeed for a
--enable-werror-always configured i686-pc-linux-gnu X m32c-elf
compiler.
You'll need the expr.c patch I checked in earlier today as revision 166360
to get entirely free of error-causing warnings.
Notes: I haven't investigated if the statement "LABEL_NUSES (label) ++;"
in m32c.c:m32c_prepare_shift still has a purpose; I just left it there
as that should be the safe option.
In m32c.c:m32c_expand_insv, the code guarded by "GET_MODE (op0) == MEM"
was inadvertantly dead (HImode is 5, MEM is 28).
I don't know if making this code live will have any unwanted side-effects.
2010-11-05 Joern Rennecke <amylaar@spamcop.net>
PR target/44754
* config/m32c/m32c.c (m32_function_arg): Rename declaration to...
(m32c_function_arg). Add comma between arguments two and three.
(m32c_promote_prototypes): Remove declaration.
(current_function_special_page_vector): Likewise.
(m32c_regno_reg_class): Change return type to enum reg_class.
(m32c_pushm_popm): Use add_reg_note.
(m32c_push_rounding): Change return type to unsigned int.
(m32c_legitimize_reload_address): Cast argument 11 to push_reload to
enum reload_type.
(m32c_insert_attributes): Constify variable name.
(m32c_output_aligned_common): Add ATTRIBUTE_UNUSED to argument decl.
(m32c_prepare_shift): Remove variable lref.
(m32c_expand_movcc): Remove variable cmp.
(m32c_expand_insv): Fix check of op0 rtx_code to use GET_CODE.
(m32c_compare_redundant): Remove variable op2.
* config/m32c/m32c-pragma.c ("c-family/c-common.h"): Include.
(m32c_pragma_memregs): Assign the number to target_memregs.
(m32c_pragma_address): Remove variable var_str.
* config/m32c/m32c.h (REG_CLASS_FROM_CONSTRAINT): Case value to
enum reg_class.
(LIMIT_RELOAD_CLASS, SECONDARY_RELOAD_CLASS): Likewise.
* config/m32c/bitops.md (andsi3): Add default case to switch.
(iorsi3, xorsi3): Likewise.
* config/m32c/addsub.md (addsi3_1, subsi3_1): Likewise.
* config/m32c/jump.md (call, call_value): Likewise.
* config/m32c/m32c-protos.h (m32c_push_rounding): Update prototype.
(m32c_regno_reg_class): Likewise.
(current_function_special_page_vector): Declare.
Index: config/m32c/m32c.c
===================================================================
--- config/m32c/m32c.c (revision 166313)
+++ config/m32c/m32c.c (working copy)
@@ -74,13 +74,12 @@ static struct machine_function *m32c_ini
static void m32c_insert_attributes (tree, tree *);
static bool m32c_legitimate_address_p (enum machine_mode, rtx, bool);
static bool m32c_addr_space_legitimate_address_p (enum machine_mode, rtx, bool, addr_space_t);
-static rtx m32_function_arg (CUMULATIVE_ARGS *, enum machine_mode
- const_tree, bool);
+static rtx m32c_function_arg (CUMULATIVE_ARGS *, enum machine_mode,
+ const_tree, bool);
static bool m32c_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode,
const_tree, bool);
static void m32c_function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode,
const_tree, bool);
-static bool m32c_promote_prototypes (const_tree);
static int m32c_pushm_popm (Push_Pop_Type);
static bool m32c_strict_argument_naming (CUMULATIVE_ARGS *);
static rtx m32c_struct_value_rtx (tree, int);
@@ -92,8 +91,6 @@ static rtx m32c_libcall_value (enum mach
/* Returns true if an address is specified, else false. */
static bool m32c_get_pragma_address (const char *varname, unsigned *addr);
-int current_function_special_page_vector (rtx);
-
#define SYMBOL_FLAG_FUNCVEC_FUNCTION (SYMBOL_FLAG_MACH_DEP << 0)
#define streq(a,b) (strcmp ((a), (b)) == 0)
@@ -623,7 +620,7 @@ m32c_modes_tieable_p (enum machine_mode
/* Register Classes */
/* Implements REGNO_REG_CLASS. */
-enum machine_mode
+enum reg_class
m32c_regno_reg_class (int regno)
{
switch (regno)
@@ -1451,8 +1448,7 @@ m32c_pushm_popm (Push_Pop_Type ppt)
pushm = F (emit_insn (gen_pushm (GEN_INT (reg_mask))));
- REG_NOTES (pushm) = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR, note,
- REG_NOTES (pushm));
+ add_reg_note (pushm, REG_FRAME_RELATED_EXPR, note);
}
if (cfun->machine->is_interrupt)
@@ -1519,7 +1515,7 @@ m32c_initial_elimination_offset (int fro
/* Implements PUSH_ROUNDING. The R8C and M16C have byte stacks, the
M32C has word stacks. */
-int
+unsigned int
m32c_push_rounding (int n)
{
if (TARGET_R8C || TARGET_M16C)
@@ -2128,7 +2124,7 @@ m32c_legitimize_reload_address (rtx * x,
type = RELOAD_FOR_OTHER_ADDRESS;
push_reload (sum, NULL_RTX, &XEXP (*x, 0), NULL,
A_REGS, Pmode, VOIDmode, 0, 0, opnum,
- type);
+ (enum reload_type) type);
return 1;
}
@@ -2144,7 +2140,7 @@ m32c_legitimize_reload_address (rtx * x,
type = RELOAD_FOR_OTHER_ADDRESS;
push_reload (XEXP (*x, 0), NULL_RTX, &XEXP (*x, 0), NULL,
A_REGS, Pmode, VOIDmode, 0, 0, opnum,
- type);
+ (enum reload_type) type);
return 1;
}
@@ -3246,7 +3242,7 @@ m32c_insert_attributes (tree node ATTRIB
if (TREE_CODE (node) == VAR_DECL)
{
- char *name = IDENTIFIER_POINTER (DECL_NAME (node));
+ const char *name = IDENTIFIER_POINTER (DECL_NAME (node));
if (m32c_get_pragma_address (name, &addr))
{
TREE_THIS_VOLATILE (node) = true;
@@ -3321,7 +3317,8 @@ m32c_get_pragma_address (const char *var
}
void
-m32c_output_aligned_common (FILE *stream, tree decl, const char *name,
+m32c_output_aligned_common (FILE *stream, tree decl ATTRIBUTE_UNUSED,
+ const char *name,
int size, int align, int global)
{
unsigned address;
@@ -4122,13 +4119,12 @@ m32c_prepare_shift (rtx * operands, int
undefined to skip one of the comparisons. */
rtx count;
- rtx label, lref, insn, tempvar;
+ rtx label, insn, tempvar;
emit_move_insn (operands[0], operands[1]);
count = temp;
label = gen_label_rtx ();
- lref = gen_rtx_LABEL_REF (VOIDmode, label);
LABEL_NUSES (label) ++;
tempvar = gen_reg_rtx (mode);
@@ -4195,7 +4191,6 @@ int
m32c_expand_movcc (rtx *operands)
{
rtx rel = operands[1];
- rtx cmp;
if (GET_CODE (rel) != EQ && GET_CODE (rel) != NE)
return 1;
@@ -4258,7 +4253,7 @@ m32c_expand_insv (rtx *operands)
if (GET_MODE (op0) == HImode
&& INTVAL (operands[2]) >= 8
- && GET_MODE (op0) == MEM)
+ && GET_CODE (op0) == MEM)
{
/* We are little endian. */
rtx new_mem = gen_rtx_MEM (QImode, plus_constant (XEXP (op0, 0), 1));
@@ -4600,14 +4595,13 @@ m32c_compare_redundant (rtx cmp, rtx *op
int flags_needed;
int pflags;
rtx prev, pp, next;
- rtx op0, op1, op2;
+ rtx op0, op1;
#if DEBUG_CMP
int prev_icode, i;
#endif
op0 = operands[0];
op1 = operands[1];
- op2 = operands[2];
#if DEBUG_CMP
fprintf(stderr, "\n\033[32mm32c_compare_redundant\033[0m\n");
Index: config/m32c/m32c-pragma.c
===================================================================
--- config/m32c/m32c-pragma.c (revision 166313)
+++ config/m32c/m32c-pragma.c (working copy)
@@ -24,9 +24,10 @@
#include "coretypes.h"
#include "tm.h"
#include "tree.h"
+#include "c-family/c-pragma.h"
+#include "c-family/c-common.h"
#include "diagnostic-core.h"
#include "toplev.h"
-#include "c-family/c-pragma.h"
#include "cpplib.h"
#include "hard-reg-set.h"
#include "output.h"
@@ -49,7 +50,6 @@ m32c_pragma_memregs (cpp_reader * reader
tree val;
enum cpp_ttype type;
HOST_WIDE_INT i;
- static char new_number[3];
type = pragma_lex (&val);
if (type == CPP_NUMBER)
@@ -70,10 +70,7 @@ m32c_pragma_memregs (cpp_reader * reader
"#pragma GCC memregs must precede any function decls");
return;
}
- new_number[0] = (i / 10) + '0';
- new_number[1] = (i % 10) + '0';
- new_number[2] = 0;
- target_memregs = new_number;
+ target_memregs = i;
m32c_conditional_register_usage ();
}
else
@@ -97,13 +94,10 @@ m32c_pragma_address (cpp_reader * reader
/* on off */
tree var, addr;
enum cpp_ttype type;
- const char *var_str;
type = pragma_lex (&var);
if (type == CPP_NAME)
{
- var_str = IDENTIFIER_POINTER (var);
-
type = pragma_lex (&addr);
if (type == CPP_NUMBER)
{
Index: config/m32c/m32c.h
===================================================================
--- config/m32c/m32c.h (revision 166313)
+++ config/m32c/m32c.h (working copy)
@@ -408,16 +408,18 @@ enum reg_class
: (CHAR) == 'A' ? 2 \
: DEFAULT_CONSTRAINT_LEN(CHAR,STR))
#define REG_CLASS_FROM_CONSTRAINT(CHAR,STR) \
- m32c_reg_class_from_constraint (CHAR, STR)
+ (enum reg_class) m32c_reg_class_from_constraint (CHAR, STR)
#define REGNO_OK_FOR_BASE_P(NUM) m32c_regno_ok_for_base_p (NUM)
#define REGNO_OK_FOR_INDEX_P(NUM) 0
#define PREFERRED_RELOAD_CLASS(X,CLASS) m32c_preferred_reload_class (X, CLASS)
#define PREFERRED_OUTPUT_RELOAD_CLASS(X,CLASS) m32c_preferred_output_reload_class (X, CLASS)
-#define LIMIT_RELOAD_CLASS(MODE,CLASS) m32c_limit_reload_class (MODE, CLASS)
+#define LIMIT_RELOAD_CLASS(MODE,CLASS) \
+ (enum reg_class) m32c_limit_reload_class (MODE, CLASS)
-#define SECONDARY_RELOAD_CLASS(CLASS,MODE,X) m32c_secondary_reload_class (CLASS, MODE, X)
+#define SECONDARY_RELOAD_CLASS(CLASS,MODE,X) \
+ (enum reg_class) m32c_secondary_reload_class (CLASS, MODE, X)
#define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
Index: config/m32c/bitops.md
===================================================================
--- config/m32c/bitops.md (revision 166313)
+++ config/m32c/bitops.md (working copy)
@@ -136,6 +136,8 @@ (define_insn "andsi3"
return \"and.w %h2,%h0\;and.w %H2,%H0\";
case 5:
return \"and.w %h2,%h0\;and.w %H2,%H0\";
+ default:
+ gcc_unreachable ();
}"
[(set_attr "flags" "x,x,x,x,x,x")]
)
@@ -314,6 +316,8 @@ (define_insn "iorsi3"
return \"or.w %h2,%h0\;or.w %H2,%H0\";
case 5:
return \"or.w %h2,%h0\;or.w %H2,%H0\";
+ default:
+ gcc_unreachable ();
}"
[(set_attr "flags" "x,x,x,x,x,x")]
)
@@ -360,6 +364,8 @@ (define_insn "xorsi3"
return \"xor.w %h2,%h0\;xor.w %H2,%H0\";
case 5:
return \"xor.w %h2,%h0\;xor.w %H2,%H0\";
+ default:
+ gcc_unreachable ();
}"
[(set_attr "flags" "x,x,x,x,x,x")]
)
Index: config/m32c/addsub.md
===================================================================
--- config/m32c/addsub.md (revision 166313)
+++ config/m32c/addsub.md (working copy)
@@ -116,6 +116,8 @@ (define_insn "addsi3_1"
return \"add.w %h2,%h0\;adc.w %H2,%H0\";
case 7:
return \"add.w %h2,%h0\;adc.w %H2,%H0\";
+ default:
+ gcc_unreachable ();
}"
[(set_attr "flags" "x,x,x,x,x,x,x,x")]
)
@@ -200,6 +202,8 @@ (define_insn "subsi3_1"
return \"sub.w %h2,%h0\;sbb.w %H2,%H0\";
case 5:
return \"sub.w %h2,%h0\;sbb.w %H2,%H0\";
+ default:
+ gcc_unreachable ();
}"
[(set_attr "flags" "x,x,x,x,x,x")]
)
Index: config/m32c/jump.md
===================================================================
--- config/m32c/jump.md (revision 166313)
+++ config/m32c/jump.md (working copy)
@@ -82,6 +82,7 @@ switch (which_alternative) {
}
case 1: return TARGET_A16 ? \"push.w %a0 | jsr.a\tm32c_jsri16\" : \"jsri.a\t%a0\";
case 2: return \"jsri.a\t%a0\";
+ default: gcc_unreachable ();
}"
[(set_attr "flags" "x")]
)
@@ -108,6 +109,7 @@ switch (which_alternative) {
}
case 1: return TARGET_A16 ? \"push.w %a1 | jsr.a\tm32c_jsri16\" : \"jsri.a\t%a1\";
case 2: return \"jsri.a\t%a1\";
+ default: gcc_unreachable ();
}"
[(set_attr "flags" "x,x,x")]
)
Index: config/m32c/m32c-protos.h
===================================================================
--- config/m32c/m32c-protos.h (revision 166313)
+++ config/m32c/m32c-protos.h (working copy)
@@ -37,7 +37,7 @@ int m32c_initial_elimination_offset (in
void m32c_output_reg_pop (FILE *, int);
void m32c_output_reg_push (FILE *, int);
int m32c_print_operand_punct_valid_p (int);
-int m32c_push_rounding (int);
+unsigned int m32c_push_rounding (int);
int m32c_reg_class_from_constraint (char, const char *);
void m32c_register_pragmas (void);
void m32c_note_pragma_address (const char *, unsigned);
@@ -78,12 +78,13 @@ int m32c_prepare_shift (rtx *, int, int
void m32c_print_operand (FILE *, rtx, int);
void m32c_print_operand_address (FILE *, rtx);
int m32c_reg_ok_for_base_p (rtx, int);
-MM m32c_regno_reg_class (int);
+enum reg_class m32c_regno_reg_class (int);
rtx m32c_return_addr_rtx (int);
const char *m32c_scc_pattern (rtx *, RTX_CODE);
int m32c_secondary_reload_class (int, MM, rtx);
int m32c_split_move (rtx *, MM, int);
int m32c_split_psi_p (rtx *);
+int current_function_special_page_vector (rtx);
#endif