Re: [RFC - ARM] - Fix PR43440 - Fix Neon inline asm register aliasing issues.

[Richard Earnshaw <rearnsha at arm dot com>]

PING - this needs a GWP review, I think.

Sorry, I'd forgotten that I'd even posted this patch, which is why I
haven't pinged it before.


On Mon, 2010-03-22 at 14:34 +0000, Richard Earnshaw wrote:
> On Sat, 2010-03-20 at 14:17 +0000, Ramana Radhakrishnan wrote:
> > Hi,
> > 
> > This is a bug that has come up a couple of times in the past few months 
> > and is one of the issues with writing inline assembler for Neon as 
> > described in the audit trail.
> > 
> > This patch has the unhappy side effect of clobbering s0, s1 and s2 
> > if s3 is used because that's the only way we can indicate that q0 is 
> > clobbered by the write to s0. Unless we generate the modes for the 
> > register in the RTL clobber list  or figure out a different way of 
> > representing this aliasing in the backend both of which I think are 
> > slightly invasive for stage4, we'll probably have to live with this. If 
> > anyone can think of a better and less invasive way of doing this, I'm all 
> > ears.
> > 
> > I've added a testcase for this and will run this through a full 
> > regression test on arm-eabi for cortex-a8. With some other simple 
> > testcases that I've tried that exercises quite a bit of the code,
> > I haven't seen any issues show up.
> > 
> > Comments if any are welcome.
> > 
> > Cheers
> > Ramana
> > 
> >         * config/arm/arm.c (TARGET_MD_ASM_CLOBBERS): Define.
> >          (arm_get_clobbers_for_sregs): Likewise.
> >          (arm_get_clobbers_for_dregs): Likewise.
> >          (arm_get_clobbers_for_qregs): Likewise.
> >          (arm_md_asm_clobbers): Likewise.
> > 
> >         * gcc.target/arm/pr43440.c: New testcase.
> > 
> 
> 
> Having discussed this with Ramana, I think there's a better way of doing
> this which is easier to implement on other machines if needed as well.
> It involves defining a new macro[1] that allows us do describe precisely
> how many machine registers an alias clobbers.
> 
> 
> 	* tm.texi (OVERLAPPING_REGISTER_NAMES): Document new macro.
> 	* output.h (decode_reg_name_and_count): Declare.
> 	* varasm.c (decode_reg_name_and_count): New function.
> 	(decode_reg_name): Reimplement using decode_reg_name_and_count.
> 	* reginfo.c (fix_register): Use decode_reg_name_and_count and 
> 	iterate over all regs used.
> 	* stmt.c (expand_asm_operands): Likewise.
> 	* arm/aout.h (OVERLAPPING_REGISTER_NAMES): Define.
> 	(ADDITIONAL_REGISTER_NAMES): Remove aliases that overlap
> 	multiple machine registers.
> 
> Comments please?  OK to apply?
> 
> R.
> 
> [1] well, we could get away with changing the definition of
> ADDITIONAL_REGISTER_NAMES, but I'd rather not as it would be somewhat of
> a testing nightmare at this point in time.