This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [PATCH] fix target/44606, reload bug on SPE
- From: Eric Botcazou <ebotcazou at adacore dot com>
- To: Andrew Pinski <pinskia at gmail dot com>
- Cc: Nathan Froyd <froydnj at codesourcery dot com>, gcc-patches at gcc dot gnu dot org, bernds at codesourcery dot com
- Date: Fri, 1 Oct 2010 10:13:29 +0200
- Subject: Re: [PATCH] fix target/44606, reload bug on SPE
- References: <20100930182927.GL32503@codesourcery.com> <201010010016.50677.ebotcazou@adacore.com> <AANLkTimEC_XU_UvLgLDp4GHD-N9QNukx-q2UpiA6BP7m@mail.gmail.com>
> > What's incorrect exactly?
>
> The upper part of (reg:DF 27 27 [750]) would not contain the correct
> value between the setting of the register to 0.5 and setting the lower
> (SI) part to 0. I think he forgot to mention (reg:DF 27 27 [750]) is
> used between those two instructions.
Between the instructions? That would be a big DCE bug then. Is that not
rather after both instructions, in which case patching reload would indeed
seem to be the correct thing to do.
--
Eric Botcazou