This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [PATCH] fix target/44606, reload bug on SPE
On 10/01/2010 12:16 AM, Eric Botcazou wrote:
>> After register allocation, then, we have:
>>
>> (insn 323 531 530 6 pr44606.c:34 (set (reg:DF 27 27 [750])
>> (mem/u/c/i:DF (reg/f:SI 11 11 [719]) [5 S8 A64])) 1503
>> {*movdf_e500_double} (expr_list:REG_EQUIV (const_double:DF 5.0e-1
>> [0x0.8p+0]) (nil)))
>>
>> ...
>>
>> (insn 63 547 598 6 ../pr44606.c:20 (set (reg:SI 27 27 [orig:750+4 ] [750])
>> (const_int 0 [0x0])) 349 {*movsi_internal1} (expr_list:REG_EQUAL
>> (const_int 0 [0x0]) (nil)))
>>
>> and a later DCE determines that insn 323 is no longer needed, deleting
>> it and resulting in incorrect code at runtime.
>
> What's incorrect exactly?
Rather than reusing the portion of reg:DF 27 which holds SImode zero, it
clobbered all of reg:DF 27, which is live past insn 63. This piece of code:
/* If this is an output reload from a simple move insn, look
if an equivalence for the input is available. */
else if (inheritance && rld[r].in == 0 && rld[r].out != 0)
{
rtx set = single_set (insn);
if (set
&& rtx_equal_p (rld[r].out, SET_DEST (set))
&& CONSTANT_P (SET_SRC (set)))
search_equiv = SET_SRC (set);
}
made us look for the equivalence. If we find one, and use it, the
original insn (#63 in this case) should be deleted, since it would just
load up the same value we already found (and in this case, clobber other
parts of the register).
Bernd