This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[ARM] Use r9 or r10 as the PIC register only when TARGET_32BIT


I'm investigating

FAIL: gcc.target/arm/pr42495.c (internal compiler error)
FAIL: gcc.target/arm/pr42495.c (test for excess errors)
FAIL: gcc.target/arm/pr42495.c scan-rtl-dump hoist "PRE/HOIST: end of bb .* copying expression": dump file does not exist


for arm-uclinuxeabi target. The cause of the ICE is because GCC uses r9 as the PIC register for thumb1 code. This patch should fix it.

The original line of the code is several years old. It might have been broken for a long time. It could be no one use -fpic on ARM uClinux or -msingle-pic-base on other arm targets. Or I missed something.

Does this patch look OK? This patch fixes the above FAILs, but I have not fully tested it. I will do the regression testing with some other patches in a few days.


Regards, -- Jie Zhang CodeSourcery
	* config/arm/arm.c (arm_option_override): Use r9 or r10
	as the PIC register only when TARGET_32BIT.

Index: config/arm/arm.c
===================================================================
--- config/arm/arm.c	(revision 164646)
+++ config/arm/arm.c	(working copy)
@@ -1868,7 +1868,7 @@ arm_option_override (void)
 
   /* If stack checking is disabled, we can use r10 as the PIC register,
      which keeps r9 available.  The EABI specifies r9 as the PIC register.  */
-  if (flag_pic && TARGET_SINGLE_PIC_BASE)
+  if (flag_pic && TARGET_SINGLE_PIC_BASE && TARGET_32BIT)
     {
       if (TARGET_VXWORKS_RTP)
 	warning (0, "RTP PIC is incompatible with -msingle-pic-base");

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]