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Re: [PATCH,rs6000] disable mfcr pattern for TARGET_ISEL
On Wed, Jul 21, 2010 at 11:32:03AM -0400, David Edelsohn wrote:
> On Tue, Jul 20, 2010 at 4:45 PM, Nathan Froyd <email@example.com> wrote:
> > On TARGET_ISEL processors, however, we can improve the matter somewhat
> > by using isel instead of mfcr. With isel, there's no need to
> > synchronize on CR as a whole, just an individual field. The
> > instructions that load zero and one can also be scheduled separately
> > from the isel itself. The patch below enables this improvement by
> > turning off the aforementioned mfcr/rlwinm pattern for TARGET_ISEL
> > processors.
> > * config/rs6000/rs6000.md (define_insn ""): Enable only for
> > !TARGET_ISEL targets.
> First, the ChangeLog needs a better identifier. define_insn "" ? At
> least add a "*" name to the unnamed pattern.
:) Fair enough.
> Do processors with TARGET_ISEL also implement MFCRF? mfcrf does not
> have the same expense as mfcr. There may be other reasons to use ISEL
> more aggressively, but I am surprised that this would be a problem on
> embedded processors with ISEL. Is this for old processors with ISEL
> or did new processors not enable TARGET_MFCRF in GCC?
The motivation was for some newer embedded processors. Older processors
with ISEL do not implement MFCRF; they can still benefit from using ISEL
instead of MFCR. Some newer embedded processors do implement MFCRF, but
MFCRF on those implementations carries the same synchronization
penalties as MFCR, so it's beneficial to use ISEL there as well.
I see now that the pattern cleverly uses 'Q' so that it works for
TARGET_MFCRF as well. Will !TARGET_ISEL || TARGET_MFCRF DTRT?