This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: 0006-GCSE-complex-constants.patch


Certain architectures (e.g., ARM) cannot easily operate with constants, they need to emit sequences of several instructions to load constants into registers. The common procedure to do this is to emit a (parallel [(set) (clobber (reg1)) ... (clobber (regN))]) instruction which later splits into several instructions using pseudos (regX) to store intermediate values.

Currently PRE and hoist do not GCSE constants, and there is a good reason for that, to avoid increasing register pressure; interestingly, symbol_refs are allowed to be GCSE'ed, is this intentional or by accident?
It's intentional; a SYMBOL_REF if often be rather expensive. Some CONST_INTs can have that same property. One could argue that an expensive CONST_INT shouldn't be appearing in RTL, but certainly some ports have chosen to handle splitting insns with expensive constants later in the pipeline.


In any case, it seems like a good idea to GCSE constants and symbol_refs that need something beyond a simple (set) to get into a register, and not GCSE them otherwise.
Rather than triggering this on the PARALLEL it might be better to trigger it on the cost of the RTX. Triggering on the PARALLEL looks like a hack to me -- IMHO we'd be better off fixing the costing mechanism and using costing as the trigger.

Jeff


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]