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Re: [patch] Improve prefetch heuristics
- From: Christian Borntraeger <borntraeger at de dot ibm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: "Fang, Changpeng" <Changpeng dot Fang at amd dot com>, "rguenther at suse dot de" <rguenther at suse dot de>, "sebpop at gmail dot com" <sebpop at gmail dot com>
- Date: Thu, 29 Apr 2010 19:08:23 +0200
- Subject: Re: [patch] Improve prefetch heuristics
- References: <1C13CD442679CE45A2E80AE9251D7EF9220E4107@SAUSEXMBP01.amd.com>
> Patch1: 0001-Do-not-insert-prefetches-if-they-would-hit-the-same-.patch
> This patch modify the prefetch generation logic. We don't issue a prefetch
> if it would fall on the same cache line with an existing memory reference or
> prefetch. This patch improves the following benchmarks: 416.gamess (~7%),
> 434.zeusmp (~4%), 454.calculix (~2%) and 445.gobmk (~2%).
>+ /* Don't issue a prefetch if its address falls on the same cache line
>+ with a previous memory reference (prefetch/load/store). */
>+ if (abs (delta - start_offset) < L1_CACHE_LINE_SIZE)
>+ /* Drop the prefetch. */
This might need a debug log entry about a dropped prefetch.
>+ continue;
>+ else
I looked a bit further into these patches.
This patch causes a regression with lbm on s390.
This is causes by the fact that ahead is 1 step is 160 and with
cache-line-size=256 this patch drops all prefetches on s390 in
lbms hotloop.
Thinking more about the whole logic, wouldnt it make sense to check for
abs (delta - start_offset) < L1_CACHE_LINE_SIZE / 2
^^^
because we cannot assume that we were starting at the beginning of a cache line?
Or maybe have something like
abs (delta - start_offset) < L1_CACHE_LINE_SIZE / CACHE_LINE_AGAIN_FACTOR
which can be defined by the architecture.
Christian