Re: WIP patch, RFC: ARM ldm/stm peephole rewrite

[Ramana Radhakrishnan <ramana dot radhakrishnan at arm dot com>]

On Thu, 2010-03-25 at 14:18 +0000, Ramana Radhakrishnan wrote:
> On Wed, 2010-03-24 at 23:52 +0100, Bernd Schmidt wrote:
> > This is a work-in-progress patch.  I'm posting it in the hope of getting
> > early feedback from the ARM maintainers.
> > 
> > The motivation for this patch is to be able to generate ldm/stm insns in
> > Thumb mode, where ldmia/stmia always update the base register.  To do
> > this, it helps to be able to use peep2_reg_dead_p, so the peepholes need
> > to be converted to define_peephole2.  In the future, some other
> > peepholes I plan to write could use peephole2's mechanism to allocate
> > free registers.
> > 
> > Not all forms of ldm/stm can be represented by existing patterns, and
> > since there's a lot of them I've written a small generator program.
> > 
> > In several places, the code to generate ldm/stm instructions is guarded
> > by TARGET_ARM.  I've left this in place, but shouldn't it be TARGET_32BIT?
> 
> Some parts of your patch seem to try and generate {ldm/stm}{ib/db} which
							      
s/ib/da/ in the above sentence. It's {ldm /stm}{ib/da} that's not supported in Thumb2.

Ramana