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PATCH: Add signed/unsigned max/min for V2DI
- From: "H.J. Lu" <hongjiu dot lu at intel dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Tue, 5 Jan 2010 12:39:19 -0800
- Subject: PATCH: Add signed/unsigned max/min for V2DI
- Reply-to: "H.J. Lu" <hjl dot tools at gmail dot com>
While working on PR target/42542, I noticed that we didn't have
signed/unsigned max/min for V2DI. They can be implememted similar
to V4SI if we have V2DI GT.
Thanks.
H.J.
---
gcc/
2010-01-05 H.J. Lu <hongjiu.lu@intel.com>
PR target/42542
* config/i386/sse.md (smaxv2di3): New.
(sminv2di3): Likewise.
(umaxv2di3): Likewise.
(uminv2di3): Likewise.
gcc/testsuite/
2010-01-05 H.J. Lu <hongjiu.lu@intel.com>
PR target/42542
* gcc.target/i386/pr42542-4.c: New.
* gcc.target/i386/pr42542-4a.c: Likewise.
* gcc.target/i386/pr42542-5.c: Likewise.
* gcc.target/i386/pr42542-5a.c: Likewise.
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 406dc0c..c0f7647 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -6220,6 +6220,86 @@
}
})
+(define_expand "smaxv2di3"
+ [(set (match_operand:V2DI 0 "register_operand" "")
+ (smax:V4SI (match_operand:V2DI 1 "register_operand" "")
+ (match_operand:V2DI 2 "register_operand" "")))]
+ "TARGET_SSE4_2"
+{
+ rtx xops[6];
+ bool ok;
+
+ xops[0] = operands[0];
+ xops[1] = operands[1];
+ xops[2] = operands[2];
+ xops[3] = gen_rtx_GT (VOIDmode, operands[1], operands[2]);
+ xops[4] = operands[1];
+ xops[5] = operands[2];
+ ok = ix86_expand_int_vcond (xops);
+ gcc_assert (ok);
+ DONE;
+})
+
+(define_expand "sminv2di3"
+ [(set (match_operand:V2DI 0 "register_operand" "")
+ (smin:V2DI (match_operand:V2DI 1 "register_operand" "")
+ (match_operand:V2DI 2 "register_operand" "")))]
+ "TARGET_SSE4_2"
+{
+ rtx xops[6];
+ bool ok;
+
+ xops[0] = operands[0];
+ xops[1] = operands[2];
+ xops[2] = operands[1];
+ xops[3] = gen_rtx_GT (VOIDmode, operands[1], operands[2]);
+ xops[4] = operands[1];
+ xops[5] = operands[2];
+ ok = ix86_expand_int_vcond (xops);
+ gcc_assert (ok);
+ DONE;
+})
+
+(define_expand "umaxv2di3"
+ [(set (match_operand:V2DI 0 "register_operand" "")
+ (umax:V4SI (match_operand:V2DI 1 "register_operand" "")
+ (match_operand:V2DI 2 "register_operand" "")))]
+ "TARGET_SSE4_2"
+{
+ rtx xops[6];
+ bool ok;
+
+ xops[0] = operands[0];
+ xops[1] = operands[1];
+ xops[2] = operands[2];
+ xops[3] = gen_rtx_GTU (VOIDmode, operands[1], operands[2]);
+ xops[4] = operands[1];
+ xops[5] = operands[2];
+ ok = ix86_expand_int_vcond (xops);
+ gcc_assert (ok);
+ DONE;
+})
+
+(define_expand "uminv2di3"
+ [(set (match_operand:V2DI 0 "register_operand" "")
+ (umin:V2DI (match_operand:V2DI 1 "register_operand" "")
+ (match_operand:V2DI 2 "register_operand" "")))]
+ "TARGET_SSE4_2"
+{
+ rtx xops[6];
+ bool ok;
+
+ xops[0] = operands[0];
+ xops[1] = operands[2];
+ xops[2] = operands[1];
+ xops[3] = gen_rtx_GTU (VOIDmode, operands[1], operands[2]);
+ xops[4] = operands[1];
+ xops[5] = operands[2];
+ ok = ix86_expand_int_vcond (xops);
+ gcc_assert (ok);
+ DONE;
+})
+
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Parallel integral comparisons
diff --git a/gcc/testsuite/gcc.target/i386/pr42542-4.c b/gcc/testsuite/gcc.target/i386/pr42542-4.c
new file mode 100644
index 0000000..afb2989
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr42542-4.c
@@ -0,0 +1,70 @@
+/* { dg-do run } */
+/* { dg-require-effective-target sse4 } */
+/* { dg-options "-O1 -msse4.2 -ftree-vectorize" } */
+
+#include "sse4_2-check.h"
+
+unsigned long long v1[] __attribute__ ((aligned(16))) =
+{
+ 0x8000000000000000ULL, 2,
+ 3, 0xd000000000000000ULL
+};
+unsigned long long v2[] __attribute__ ((aligned(16))) =
+{
+ 4, 0xb000000000000000ULL,
+ 0xf000000000000000ULL, 6
+};
+
+unsigned long long max[] =
+{
+ 0x8000000000000000ULL, 0xb000000000000000ULL,
+ 0xf000000000000000ULL, 0xd000000000000000ULL
+};
+
+unsigned long long min[] =
+{
+ 4, 2,
+ 3, 6
+};
+
+unsigned long long res[4] __attribute__ ((aligned(16)));
+
+extern void abort (void);
+
+void
+find_max (void)
+{
+ int i;
+
+ for (i = 0; i < 4; i++)
+ res[i] = v1[i] < v2[i] ? v2[i] : v1[i];
+}
+
+void
+find_min (void)
+{
+ int i;
+
+ for (i = 0; i < 4; i++)
+ res[i] = v1[i] > v2[i] ? v2[i] : v1[i];
+}
+
+static void
+sse4_2_test (void)
+{
+ int i;
+ int err = 0;
+
+ find_max ();
+ for (i = 0; i < 4; i++)
+ if (res[i] != max[i])
+ err++;
+
+ find_min ();
+ for (i = 0; i < 4; i++)
+ if (res[i] != min[i])
+ err++;
+
+ if (err)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr42542-4a.c b/gcc/testsuite/gcc.target/i386/pr42542-4a.c
new file mode 100644
index 0000000..bea6c1f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr42542-4a.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O1 -msse4.2 -ftree-vectorize" } */
+
+#include "pr42542-4.c"
+
+/* { dg-final { scan-assembler "pcmpgtq" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr42542-5.c b/gcc/testsuite/gcc.target/i386/pr42542-5.c
new file mode 100644
index 0000000..7d77a18
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr42542-5.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-require-effective-target sse4 } */
+/* { dg-options "-O1 -msse4.2 -ftree-vectorize" } */
+
+#include "sse4_2-check.h"
+
+long long v1[] __attribute__ ((aligned(16))) =
+{
+ -3, 2, 3, -4
+};
+long long v2[] __attribute__ ((aligned(16))) =
+{
+ 4, -10, -20, 6
+};
+
+long long max[] =
+{
+ 4, 2, 3, 6
+};
+
+long long min[] =
+{
+ -3, -10, -20, -4
+};
+
+long long res[4] __attribute__ ((aligned(16)));
+
+extern void abort (void);
+
+void
+find_max (void)
+{
+ int i;
+
+ for (i = 0; i < 4; i++)
+ res[i] = v1[i] < v2[i] ? v2[i] : v1[i];
+}
+
+void
+find_min (void)
+{
+ int i;
+
+ for (i = 0; i < 4; i++)
+ res[i] = v1[i] > v2[i] ? v2[i] : v1[i];
+}
+
+static void
+sse4_2_test (void)
+{
+ int i;
+ int err = 0;
+
+ find_max ();
+ for (i = 0; i < 4; i++)
+ if (res[i] != max[i])
+ err++;
+
+ find_min ();
+ for (i = 0; i < 4; i++)
+ if (res[i] != min[i])
+ err++;
+
+ if (err)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr42542-5a.c b/gcc/testsuite/gcc.target/i386/pr42542-5a.c
new file mode 100644
index 0000000..bba0a11
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr42542-5a.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O1 -msse4.2 -ftree-vectorize" } */
+
+#include "pr42542-5.c"
+
+/* { dg-final { scan-assembler "pcmpgtq" } } */