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Re: PATCH: Add LWP support for upcoming AMD Orochi processor.


On Fri, Dec 11, 2009 at 11:24 PM, Sebastian Pop <sebpop@gmail.com> wrote:
> Hi,
>
> On Fri, Dec 11, 2009 at 16:26, Sebastian Pop <sebpop@gmail.com> wrote:
>> On Fri, Dec 11, 2009 at 15:34, Jakub Jelinek <jakub@redhat.com> wrote:
>>> If you are ok with these, can you combine the 3 patches posted today,
>>> write ChangeLog, test it and submit?
>>>
>>
>> Yes, I will do this.
>
> Here is the patch that fixes the support for LWP.
>
> 2009-12-11 ?Jakub Jelinek ?<jakub@redhat.com>
> ? ? ? ? ? ?Sebastian Pop ?<sebastian.pop@amd.com>
>
> ? ? ? ?* config/i386/i386-builtin-types.def (PVOID): Declared.
> ? ? ? ?(VOID_FTYPE_PVOID): Declared.
> ? ? ? ?(PVOID_FTYPE_VOID): Declared.
> ? ? ? ?(UCHAR_FTYPE_USHORT_UINT_USHORT): Removed.
> ? ? ? ?(VOID_FTYPE_USHORT_UINT_USHORT): Removed.
> ? ? ? ?* config/i386/i386.c (IX86_BUILTIN_LLWPCB16, IX86_BUILTIN_LLWPCB32,
> ? ? ? ?IX86_BUILTIN_LLWPCB64, IX86_BUILTIN_SLWPCB16, IX86_BUILTIN_SLWPCB32,
> ? ? ? ?IX86_BUILTIN_SLWPCB64, IX86_BUILTIN_LWPVAL16, IX86_BUILTIN_LWPINS16):
> ? ? ? ?Removed.
> ? ? ? ?(IX86_BUILTIN_LLWPCB, IX86_BUILTIN_SLWPCB): New.
> ? ? ? ?(bdesc_special_args): Adjust declaration of __builtin_ia32_llwpcb,
> ? ? ? ?__builtin_ia32_slwpcb, __builtin_ia32_lwpval32,
> ? ? ? ?__builtin_ia32_lwpval64, __builtin_ia32_lwpins32, and
> ? ? ? ?__builtin_ia32_lwpins64.
> ? ? ? ?(ix86_expand_special_args_builtin): Handle VOID_FTYPE_PVOID.
> ? ? ? ?Do not handle VOID_FTYPE_USHORT_UINT_USHORT and
> ? ? ? ?UCHAR_FTYPE_USHORT_UINT_USHORT. ?Warn when the third operand is
> ? ? ? ?not an immediate. ?Also handle builtin functions with 3 arguments.
> ? ? ? ?(ix86_expand_builtin): Handle IX86_BUILTIN_LLWPCB and
> ? ? ? ?IX86_BUILTIN_SLWPCB.
> ? ? ? ?* config/i386/i386.md (UNSPEC_LLWP_INTRINSIC, UNSPEC_SLWP_INTRINSIC):
> ? ? ? ?Renamed UNSPECV_LLWP_INTRINSIC and UNSPECV_SLWP_INTRINSIC.
> ? ? ? ?(memory attribute): Handle lwp.
> ? ? ? ?(lwp*): Rewrite all the insn patterns for LWP.
> ? ? ? ?* config/i386/lwpintrin.h (__llwpcb16, __llwpcb32, __llwpcb64,
> ? ? ? ?__slwpcb16, __slwpcb32, __slwpcb64, __lwpval16, __lwpins16): Removed.
> ? ? ? ?(__llwpcb, __slwpcb): New.
>
> ? ? ? ?testsuite/
> ? ? ? ?* gcc.target/i386/sse-12.c: Add -mpopcnt and -mlwp.
> ? ? ? ?* gcc.target/i386/sse-13.c: Same.
> ? ? ? ?(__builtin_ia32_lwpval32, __builtin_ia32_lwpval64,
> ? ? ? ?__builtin_ia32_lwpins32, __builtin_ia32_lwpins64): Added testcases.
> ? ? ? ?* gcc.target/i386/sse-14.c: Add -mpopcnt -mabm -mlwp.
> ? ? ? ?Added tests for __lwpval32, __lwpins32, __lwpval64, and __lwpins64.
> ? ? ? ?* gcc.target/i386/sse-22.c: Added tests for popcnt, abm, and lwp.
> ? ? ? ?* gcc.target/i386/sse-23.c: Same.
>

This patch breaks gcc bootstrap on Linux/ia32:

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42369

The problem is

;; Single word integer modes without QImode and HImode.
(define_mode_iterator SWI48 [SI (DI "TARGET_64BIT")])

with

              case CODE_FOR_lwp_lwpvalsi3:
              case CODE_FOR_lwp_lwpvaldi3:
              case CODE_FOR_lwp_lwpinssi3:
              case CODE_FOR_lwp_lwpinsdi3:


Both CODE_FOR_lwp_lwpvaldi3 and CODE_FOR_lwp_lwpinsdi3
are  CODE_FOR_nothing for ia32.

I don't think you can use (DI "TARGET_64BIT") in define_mode_iterator.


-- 
H.J.


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