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Vector permutation support for x86
- From: Richard Henderson <rth at redhat dot com>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Cc: Sebastian Pop <sebastian dot pop at amd dot com>
- Date: Wed, 25 Nov 2009 18:56:00 -0800
- Subject: Vector permutation support for x86
The following implements the builtin_vec_perm hook so that the
vectorizer can do its SLP thing. As noted elsewhere, ISAs before SSSE3
cannot arbitrarily permute, so this complicates things a bit. But even
given SSSE3, the arbitrary two-vector permute costs 3 insns, and so we
would want to do most of this work to find the 1 and 2 insn special cases.
For the AMD folk: I tried to support the vpperm insn from the XOP ISA,
but there seems to be some disconnect between trunk binutils and trunk
gcc wrt vpperm. This can be seen in the failure of the new test
"vperm-v4si-2x.c". I'm looking at the XOP spec labeled "Pub No 43479,
Rev 3.03, May 2009", and what gcc is emitting looks ok. But I've
already been bitten by an out-of-date AVX spec during this adventure, so
I'd appreciate some double-check.
Tested on an i7 machine (i.e. sse4.2).
r~
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