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It just doesn't feel right for a RISC target to be including zero-extending loads in its basic AND pattern.
But maybe I'm being unreasonable. If RTH is happy with the patch you posted, I won't stand in its way.
I had a look around at some other ports, and you're right that other risc targets don't include the zero-extending loads. On the other hand, none of the other ports I looked at have to worry about
! ;; Combine is not allowed to convert this insn into a zero_extendsidi2 because ! ;; of TRULY_NOOP_TRUNCATION.
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