Re: [PATCH][ARM] VFP load/store index

[Chung-Lin Tang <cltang at pllab dot cs dot nthu dot edu dot tw>]

Daniel Jacobowitz wrote:
> Can't this be combined with the FPA/MAVERICK case immediately
> preceeding?  The offsets should be the same.
>
> Also, do you have a test case?

I see what you mean; originally I intended to avoid the mode class == MODE_FLOAT test in the FPA/Maverick case, to not step on the HFmode cases handled below, so I simply broke off a new if-clause.

But come to think of it, maybe the right way should be to combine the cases, and fix the FPA/Maverick case to avoid HFmode too. So here's the updated patch. Thanks for pointing out the similarities Daniel.

I now have a test case attached, as a patch to gcc.target/arm/vfp-1.c. These are assembler scan tests for a new added test_ldst() function. You can observe the differences in generated code for this function, before and after the patch.

C.L.


2009-08-01 Chung-Lin Tang <cltang@pllab.cs.nthu.edu.tw>

  gcc/
  * config/arm/arm.c (arm_legitimate_index_p): Add VFP load/store
  index range case. Change to SF/DFmode tests to avoid capturing HFmode.

  gcc/testsuite/
  * gcc.target/arm/vfp-1.c (test_ldst): New test for VFP load/store
  immediate indexes.


Index: config/arm/arm.c
===================================================================
--- config/arm/arm.c	(revision 150316)
+++ config/arm/arm.c	(working copy)
@@ -4244,8 +4244,8 @@
 
   /* Standard coprocessor addressing modes.  */
   if (TARGET_HARD_FLOAT
-      && (TARGET_FPA || TARGET_MAVERICK)
-      && (GET_MODE_CLASS (mode) == MODE_FLOAT
+      && (TARGET_FPA || TARGET_MAVERICK || TARGET_VFP)
+      && (mode == SFmode || mode == DFmode
 	  || (TARGET_MAVERICK && mode == DImode)))
     return (code == CONST_INT && INTVAL (index) < 1024
 	    && INTVAL (index) > -1024

Index: gcc.target/arm/vfp-1.c
===================================================================
--- gcc.target/arm/vfp-1.c	(revision 150316)
+++ gcc.target/arm/vfp-1.c	(working copy)
@@ -125,3 +125,16 @@
   d1 = u1;
 }
 
+void test_ldst (float f[], double d[]) {
+  /* { dg-final { scan-assembler "flds\.+ \[r0, #1020\]" } } */
+  /* { dg-final { scan-assembler "flds\.+ \[r0, #-1020\]" } } */
+  /* { dg-final { scan-assembler "add\.+ r0, #1024" } } */
+  /* { dg-final { scan-assembler "fsts\.+, #0\]" } } */
+  f[256] = f[255] + f[-255];
+
+  /* { dg-final { scan-assembler "fldd\.+ \[r1, #1016\]" } } */
+  /* { dg-final { scan-assembler "fldd\.+ \[r1, #-1016\]" } } */
+  /* { dg-final { scan-assembler "fstd\.+ \[r1, #256\]" } } */
+  d[32] = d[127] + d[-127];
+}
+