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Re: [PATCH] Use RTX_AUTOINC in rs6000 predicates.md
> I agree with adding a constraint along the lines of the ia64 one for
> non-autoinc addresses. ?You will need to find an available letter.
OK, thanks. As you say, there's a shortage of letters, so is it OK
to start using two-letter constraints? I went for "es" because "e"
seems to be unused, and could mean "extended". "s" stands for stable.
Let me know if you prefer something else though, it should be a simple
sed to change.
I redocumented "m" in the PowerPC constraints section of md.texi,
like we do for ia64, so that we could mention update addresses and the
%U syntax. (I used @var{<opno>} instead of @var{opno} since the former
gets rendered as "%UOPNO" in info files.) The documentation of some
constraints suggested using "m" for asms instead, so I suggested "es" too.
I think the idea is to keep the define_constraint strings and the
md.texi documentation in sync, but we don't do that yet, and it seemed
odd to add the full documentation to constraints.md for this one case.
It could soon get out of sync anyway. It doesn't seem worth worrying
about this until we start generating the documentation automatically.
Cross-tested on powerpc-ibm-aix6.1 with no regressions. OK to install?
Richard
gcc/
* doc/md.texi: Document the new PowerPC "es" constraint.
Document that "m" can include automodified addresses on this target,
and explain how %U must be used. Extend the "Q" and "Z" documentation
to suggest "es" as well as "m".
* config/rs6000/constraints.md (es): New memory constraint.
(Q, Z): Update strings to match new documentation.
gcc/testsuite/
* gcc.target/powerpc/asm-es-1.c: New test.
* gcc.target/powerpc/asm-es-2.c: Likewise.
Index: gcc/doc/md.texi
===================================================================
--- gcc/doc/md.texi 2009-07-15 15:34:57.000000000 +0100
+++ gcc/doc/md.texi 2009-07-16 08:31:07.000000000 +0100
@@ -1972,13 +1972,40 @@ instruction per word
Integer/Floating point constant that can be loaded into a register using
three instructions
+@item m
+Memory operand. Note that on PowerPC targets, @code{m} can include
+addresses that update the base register. It is therefore only safe
+to use @samp{m} in an @code{asm} statement if that @code{asm} statement
+accesses the operand exactly once. The @code{asm} statement must also
+use @samp{%U@var{<opno>}} as a placeholder for the ``update'' flag in the
+corresponding load or store instruction. For example:
+
+@smallexample
+asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
+@end smallexample
+
+is correct but:
+
+@smallexample
+asm ("st %1,%0" : "=m" (mem) : "r" (val));
+@end smallexample
+
+is not. Use @code{es} rather than @code{m} if you don't want the
+base register to be updated.
+
+@item es
+A ``stable'' memory operand; that is, one which does not include any
+automodification of the base register. Unlike @samp{m}, this constraint
+can be used in @code{asm} statements that might access the operand
+several times, or that might not access it at all.
+
@item Q
-Memory operand that is an offset from a register (@samp{m} is preferable
-for @code{asm} statements)
+Memory operand that is an offset from a register (it is usually better
+to use @samp{m} or @samp{es} in @code{asm} statements)
@item Z
-Memory operand that is an indexed or indirect from a register (@samp{m} is
-preferable for @code{asm} statements)
+Memory operand that is an indexed or indirect from a register (it is
+usually better to use @samp{m} or @samp{es} in @code{asm} statements)
@item R
AIX TOC entry
Index: gcc/config/rs6000/constraints.md
===================================================================
--- gcc/config/rs6000/constraints.md 2009-07-15 15:34:57.000000000 +0100
+++ gcc/config/rs6000/constraints.md 2009-07-16 08:31:07.000000000 +0100
@@ -113,8 +113,17 @@ (define_constraint "H"
;; Memory constraints
+(define_memory_constraint "es"
+ "A ``stable'' memory operand; that is, one which does not include any
+automodification of the base register. Unlike @samp{m}, this constraint
+can be used in @code{asm} statements that might access the operand
+several times, or that might not access it at all."
+ (and (match_code "mem")
+ (match_test "GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC")))
+
(define_memory_constraint "Q"
- "Memory operand that is just an offset from a reg"
+ "Memory operand that is an offset from a register (it is usually better
+to use @samp{m} or @samp{es} in @code{asm} statements)"
(and (match_code "mem")
(match_test "GET_CODE (XEXP (op, 0)) == REG")))
@@ -123,7 +132,8 @@ (define_memory_constraint "Y"
(match_operand 0 "word_offset_memref_operand"))
(define_memory_constraint "Z"
- "Indexed or indirect memory operand"
+ "Memory operand that is an indexed or indirect from a register (it is
+usually better to use @samp{m} or @samp{es} in @code{asm} statements)"
(match_operand 0 "indexed_or_indirect_operand"))
;; Address constraints
Index: gcc/testsuite/gcc.target/powerpc/asm-es-1.c
===================================================================
--- /dev/null 2009-07-01 13:46:58.466210000 +0100
+++ gcc/testsuite/gcc.target/powerpc/asm-es-1.c 2009-07-16 08:31:07.000000000 +0100
@@ -0,0 +1,32 @@
+/* { dg-do run } */
+/* { dg-options "-O2" } */
+
+static inline void __attribute__((always_inline))
+f1 (void)
+{
+ long unused;
+ asm volatile ("" : "=es" (unused) :: "memory");
+}
+
+static void __attribute__((noinline))
+f2 (long *val)
+{
+ *val = 0x1234;
+}
+
+static long __attribute__((noinline))
+test (void)
+{
+ f1 ();
+ {
+ long val;
+ f2 (&val);
+ return val;
+ }
+}
+
+int
+main (void)
+{
+ return test () != 0x1234;
+}
Index: gcc/testsuite/gcc.target/powerpc/asm-es-2.c
===================================================================
--- /dev/null 2009-07-01 13:46:58.466210000 +0100
+++ gcc/testsuite/gcc.target/powerpc/asm-es-2.c 2009-07-16 08:31:07.000000000 +0100
@@ -0,0 +1,37 @@
+/* { dg-options "-O2" } */
+void
+f1 (int *p, int x)
+{
+ asm ("asm1 %0" : "=es" (p[x]));
+}
+
+void
+f2 (int *p)
+{
+ while (1)
+ {
+ p += 4;
+ asm ("asm2%U0 %0" : "=m" (*p));
+ }
+}
+
+void
+f3 (int *p)
+{
+ while (1)
+ {
+ p += 4;
+ asm ("asm3%U0 %0" : "=es" (*p));
+ }
+}
+
+void
+f4 (int *p)
+{
+ asm ("asm4 %0" : "=es" (p[100]));
+}
+
+/* { dg-final { scan-assembler "asm1 3,4" } } */
+/* { dg-final { scan-assembler "asm2u 16\\(3\\)" } } */
+/* { dg-final { scan-assembler "asm3 0\\(3\\)" } } */
+/* { dg-final { scan-assembler "asm4 400\\(3\\)" } } */