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This patch changes how the register constraints are setup, to use an array to hold the constraints for each of the register constraints that can vary at runtime ("d", "f", etc.).
It also adds some new debug switches to try an isolate some performance issues, and makes the power5 schedule like a power7.
* config/rs6000/vsx.md (vsx_store<mode>_update64): Use correct registers for store with update. (vsx_store<mode>_update32): Ditto. (vsx_storedf_update<VSbit>): Ditto.
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