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Re: [power7-meissner] Add __builtin_bswap{16,64} support to powerpc
- From: Michael Meissner <meissner at linux dot vnet dot ibm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Thu, 11 Jun 2009 18:56:53 -0400
- Subject: Re: [power7-meissner] Add __builtin_bswap{16,64} support to powerpc
- References: <20090611214044.GA19151@hungry-tiger.westford.ibm.com>
Andrew reminded me that the cell powerpc also has ldbrx/stdbrx, so this patch
adds support for -mcpu=cell.
[gcc]
2009-06-11 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.md (bswapdi*): Cell powerpc also supports
ldbrx, stdbrx.
* config/rs6000/rs6000.h (TARGET_LDBRX): Define as true on the
machines that support ldbrx.
[gcc/testsuite]
2009-06-11 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/bswap64-1.c: Force cpu to power5.
* gcc.target/powerpc/bswap64-2.c: Make sure compiler supports VSX.
* gcc.target/powerpc/bswap64-3.c: New file.
Index: gcc/config/rs6000/rs6000.h
===================================================================
--- gcc/config/rs6000/rs6000.h (revision 148399)
+++ gcc/config/rs6000/rs6000.h (working copy)
@@ -507,6 +507,7 @@ extern int rs6000_vector_align[];
#define TARGET_LONG_DOUBLE_128 (rs6000_long_double_type_size == 128)
#define TARGET_IEEEQUAD rs6000_ieeequad
#define TARGET_ALTIVEC_ABI rs6000_altivec_abi
+#define TARGET_LDBRX (TARGET_POPCNTD || rs6000_cpu == PROCESSOR_CELL)
#define TARGET_SPE_ABI 0
#define TARGET_SPE 0
Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md (revision 148399)
+++ gcc/config/rs6000/rs6000.md (working copy)
@@ -2406,14 +2406,15 @@ (define_expand "bswapdi2"
}
})
-;; Power7 has ldbrx/stdbrx, so use it directly
-(define_insn "*bswapdi2_power7"
+;; Power7/cell has ldbrx/stdbrx, so use it directly
+(define_insn "*bswapdi2_ldbrx"
[(set (match_operand:DI 0 "reg_or_mem_operand" "=&r,Z,??&r")
(bswap:DI (match_operand:DI 1 "reg_or_mem_operand" "Z,r,r")))
(clobber (match_scratch:DI 2 "=X,X,&r"))
(clobber (match_scratch:DI 3 "=X,X,&r"))
(clobber (match_scratch:DI 4 "=X,X,&r"))]
- "TARGET_POWERPC64 && TARGET_POPCNTD && (REG_P (operands[0]) || REG_P (operands[1]))"
+ "TARGET_POWERPC64 && TARGET_LDBRX
+ && (REG_P (operands[0]) || REG_P (operands[1]))"
"@
ldbrx %0,%y1
stdbrx %1,%y0
@@ -2421,14 +2422,15 @@ (define_insn "*bswapdi2_power7"
[(set_attr "length" "4,4,36")
(set_attr "type" "load,store,*")])
-;; Non-power7, fall back to use lwbrx/stwbrx
+;; Non-power7/cell, fall back to use lwbrx/stwbrx
(define_insn "*bswapdi2_64bit"
[(set (match_operand:DI 0 "reg_or_mem_operand" "=&r,Z,??&r")
(bswap:DI (match_operand:DI 1 "reg_or_mem_operand" "Z,r,r")))
(clobber (match_scratch:DI 2 "=&b,&b,&r"))
(clobber (match_scratch:DI 3 "=&b,&r,&r"))
(clobber (match_scratch:DI 4 "=&b,X,&r"))]
- "TARGET_POWERPC64 && !TARGET_POPCNTD && (REG_P (operands[0]) || REG_P (operands[1]))"
+ "TARGET_POWERPC64 && !TARGET_LDBRX
+ && (REG_P (operands[0]) || REG_P (operands[1]))"
"#"
[(set_attr "length" "16,12,36")])
@@ -2438,7 +2440,7 @@ (define_split
(clobber (match_operand:DI 2 "gpc_reg_operand" ""))
(clobber (match_operand:DI 3 "gpc_reg_operand" ""))
(clobber (match_operand:DI 4 "gpc_reg_operand" ""))]
- "TARGET_POWERPC64 && !TARGET_POPCNTD && reload_completed"
+ "TARGET_POWERPC64 && !TARGET_LDBRX && reload_completed"
[(const_int 0)]
"
{
@@ -2488,7 +2490,7 @@ (define_split
(clobber (match_operand:DI 2 "gpc_reg_operand" ""))
(clobber (match_operand:DI 3 "gpc_reg_operand" ""))
(clobber (match_operand:DI 4 "" ""))]
- "TARGET_POWERPC64 && !TARGET_POPCNTD && reload_completed"
+ "TARGET_POWERPC64 && reload_completed && !TARGET_LDBRX"
[(const_int 0)]
"
{
Index: gcc/testsuite/gcc.target/powerpc/bswap64-2.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/bswap64-2.c (revision 148399)
+++ gcc/testsuite/gcc.target/powerpc/bswap64-2.c (working copy)
@@ -1,6 +1,7 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-options "-O2 -mpopcntd" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
/* { dg-final { scan-assembler "ldbrx" } } */
/* { dg-final { scan-assembler "stdbrx" } } */
Index: gcc/testsuite/gcc.target/powerpc/bswap64-3.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/bswap64-3.c (revision 0)
+++ gcc/testsuite/gcc.target/powerpc/bswap64-3.c (revision 0)
@@ -0,0 +1,10 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-options "-O2 -mcpu=cell" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target powerpc_ppu_ok } */
+/* { dg-final { scan-assembler "ldbrx" } } */
+/* { dg-final { scan-assembler "stdbrx" } } */
+
+unsigned long ul;
+unsigned long load_bswap64 (unsigned long *p) { return __builtin_bswap64 (*p); }
+void store_bswap64 (unsigned long a) { ul = __builtin_bswap64 (a); }
Index: gcc/testsuite/gcc.target/powerpc/bswap64-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/bswap64-1.c (revision 148399)
+++ gcc/testsuite/gcc.target/powerpc/bswap64-1.c (working copy)
@@ -1,5 +1,5 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-options "-O2 -mno-popcntd" } */
+/* { dg-options "-O2 -mno-popcntd -mcpu=power5" } */
/* { dg-require-effective-target lp64 } */
/* { dg-final { scan-assembler "lwbrx" } } */
/* { dg-final { scan-assembler "stwbrx" } } */
--
Michael Meissner, IBM
4 Technology Place Drive, MS 2203A, Westford, MA, 01886, USA
meissner@linux.vnet.ibm.com