This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
[PATCH] ARM half-precision floating point, part 9/8 (HF mode attribute)
- From: Sandra Loosemore <sandra at codesourcery dot com>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Cc: Paul Brook <paul at codesourcery dot com>
- Date: Mon, 18 May 2009 10:38:32 -0400
- Subject: [PATCH] ARM half-precision floating point, part 9/8 (HF mode attribute)
Yes, the subject line is right; this is a new piece.
It was previously noted that the test cases I posted in part 8 did not include
any tests for __attribute__((mode(HF))) syntax. Well, the trouble was that
wasn't supported at all. This patch adds both the support and the test cases.
I verified that making TARGET_SCALAR_MODE_SUPPORTED_P return true for HFmode did
not cause any test failures elsewhere.
OK to commit?
-Sandra
2009-05-18 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* config/arm/arm.c (TARGET_SCALAR_MODE_SUPPORTED_P): Redefine.
(arm_scalar_mode_supported_p): New function.
gcc/testsuite/
* gcc.target/arm/fp16-compile-none-2.c: New.
* gcc.target/arm/fp16-compile-ieee-12.c: New.
* gcc.target/arm/fp16-compile-alt-12.c: New.
diff -u gcc/config/arm/arm.c gcc/config/arm/arm.c
--- gcc/config/arm/arm.c (working copy)
+++ gcc/config/arm/arm.c (working copy)
@@ -205,6 +205,7 @@
static const char *arm_invalid_return_type (const_tree t);
static tree arm_promoted_type (const_tree t);
static tree arm_convert_to_type (tree type, tree expr);
+static bool arm_scalar_mode_supported_p (enum machine_mode);
/* Initialize the GCC target structure. */
@@ -424,6 +425,9 @@
#undef TARGET_CONVERT_TO_TYPE
#define TARGET_CONVERT_TO_TYPE arm_convert_to_type
+#undef TARGET_SCALAR_MODE_SUPPORTED_P
+#define TARGET_SCALAR_MODE_SUPPORTED_P arm_scalar_mode_supported_p
+
struct gcc_target targetm = TARGET_INITIALIZER;
/* Obstack for minipool constant handling. */
@@ -16374,2 +16378,17 @@
+/* Implement TARGET_SCALAR_MODE_SUPPORTED_P.
+ This simply adds HFmode as a supported mode; even though we don't
+ implement arithmetic on this type directly, it's supported by
+ optabs conversions, much the way the double-word arithmetic is
+ special-cased in the default hook. */
+
+static bool
+arm_scalar_mode_supported_p (enum machine_mode mode)
+{
+ if (mode == HFmode)
+ return (arm_fp16_format != ARM_FP16_FORMAT_NONE);
+ else
+ return default_scalar_mode_supported_p (mode);
+}
+
/* Errors in the source file can cause expand_expr to return const0_rtx
only in patch2:
unchanged:
--- gcc/testsuite/gcc.target/arm/fp16-compile-none-2.c (revision 0)
+++ gcc/testsuite/gcc.target/arm/fp16-compile-none-2.c (revision 0)
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=none" } */
+
+/* mode(HF) attributes are not recognized unless you explicitly enable
+ half-precision floating point by selecting -mfp16-format=ieee or
+ -mfp16-format=alternative. */
+float xx __attribute__((mode(HF))) = 0.0; /* { dg-error "HF" } */
only in patch2:
unchanged:
--- gcc/testsuite/gcc.target/arm/fp16-compile-ieee-12.c (revision 0)
+++ gcc/testsuite/gcc.target/arm/fp16-compile-ieee-12.c (revision 0)
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+float xx __attribute__((mode(HF))) = 0.0;
+
+/* { dg-final { scan-assembler "\t.eabi_attribute 38, 1" } } */
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.space\t2" } } */
only in patch2:
unchanged:
--- gcc/testsuite/gcc.target/arm/fp16-compile-alt-12.c (revision 0)
+++ gcc/testsuite/gcc.target/arm/fp16-compile-alt-12.c (revision 0)
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=alternative" } */
+
+float xx __attribute__((mode(HF))) = 0.0;
+
+/* { dg-final { scan-assembler "\t.eabi_attribute 38, 2" } } */
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.space\t2" } } */