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[power7-meissner] Fix typo in store with update instructions
- From: Michael Meissner <meissner at linux dot vnet dot ibm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Mon, 9 Mar 2009 12:34:26 -0400
- Subject: [power7-meissner] Fix typo in store with update instructions
I discovered my last patch had a typo, that I uncovered when running Spec.
2009-03-09 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/vsx.md (vsx_store<mode>_update64): Use correct
registers for store with update.
(vsx_store<mode>_update32): Ditto.
(vsx_storedf_update<VSbit>): Ditto.
Index: gcc/config/rs6000/vsx.md
===================================================================
--- gcc/config/rs6000/vsx.md (revision 144691)
+++ gcc/config/rs6000/vsx.md (working copy)
@@ -150,7 +150,7 @@
(plus:DI (match_dup 1)
(match_dup 2)))]
"TARGET_64BIT && TARGET_UPDATE && VECTOR_MEM_VSX_P (<MODE>mode)"
- "stx<VSm>ux %x3,%0,%1"
+ "stx<VSm>ux %x3,%0,%2"
[(set_attr "type" "vecstore")])
(define_insn "*vsx_store<mode>_update32"
@@ -161,7 +161,7 @@
(plus:SI (match_dup 1)
(match_dup 2)))]
"TARGET_32BIT && TARGET_UPDATE && VECTOR_MEM_VSX_P (<MODE>mode)"
- "stx<VSm>ux %x3,%0,%1"
+ "stx<VSm>ux %x3,%0,%2"
[(set_attr "type" "vecstore")])
(define_insn "*vsx_loaddf_update<VSbit>"
@@ -183,7 +183,7 @@
(plus:P (match_dup 1)
(match_dup 2)))]
"TARGET_<VSbit>BIT && TARGET_UPDATE && VECTOR_MEM_VSX_P (DFmode)"
- "stxsdux %x3,%0,%1"
+ "stxsdux %x3,%0,%2"
[(set_attr "type" "vecstore")])
;; We may need to have a varient on the pattern for use in the prologue
--
Michael Meissner, IBM
4 Technology Place Drive, MS 2203A, Westford, MA, 01886, USA
meissner@linux.vnet.ibm.com