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- From: Uros Bizjak <ubizjak at gmail dot com>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Cc: "H.J. Lu" <hjl dot tools at gmail dot com>, Ross Ridge <rridge at csclub dot uwaterloo dot ca>
- Date: Sun, 23 Nov 2008 21:36:10 +0100
- Subject: Re:
H.J. Lu writes:
>I am not sure how useful that is for 32bit since it will generate a
>nop for most machines which do need mfence.
I don't understand what you're saying. Using "lock orb" should result
in a memory fence on any IA-32 SMP system, old or new. It's just a more
heavyweight way of ordering loads and stores.
The Linux kernel apparently takes the same approach, using either "lock
addl" or "mfence" depending on whether SSE2 instructions are available
at compile time.
No, linux dynamically patches its code:
#define mb() alternative("lock; addl $0,0(%%esp)", "mfence",
#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence",
#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence",
But anyway, gcc can't do that by itself.