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Re: Patch for PR libgomp/37938, IA64 specific.


On Tue, 2008-11-04 at 18:17 +0100, Jakub Jelinek wrote:

> Shouldn't sync_lock_release<mode> get the same treatment on ia64 though?

I think you are right.  I have added a memory_barrier call in
sync_lock_release<mode> to my patch and retested.  Here is the current
patch I intend to check in:

2008-11-06  Steve Ellcey  <sje@cup.hp.com>

	PR libgomp/37938
	* config/ia64/sync.md (sync_lock_test_and_set_xchg<mode>): New name
	for original sync_lock_test_and_set<mode>.
	(sync_lock_test_and_set<mode>): Create define_expand version.
	(sync_lock_release<mode>): Add memory_barrier.


Index: config/ia64/sync.md
===================================================================
--- config/ia64/sync.md	(revision 141635)
+++ config/ia64/sync.md	(working copy)
@@ -159,7 +159,20 @@ (define_insn "cmpxchg_rel_di"
   "cmpxchg8.rel %0 = %1, %3, %2"
   [(set_attr "itanium_class" "sem")])
 
-(define_insn "sync_lock_test_and_set<mode>"
+(define_expand "sync_lock_test_and_set<mode>"
+  [(set (match_operand:IMODE 0 "gr_register_operand" "")
+        (match_operand:IMODE 1 "not_postinc_memory_operand" ""))
+   (set (match_dup 1)
+        (match_operand:IMODE 2 "gr_register_operand" ""))]
+  ""
+{
+  emit_insn (gen_memory_barrier ());
+  emit_insn (gen_sync_lock_test_and_set_xchg<mode> (operands[0], operands[1],
+	     operands[2]));
+  DONE;
+})
+
+(define_insn "sync_lock_test_and_set_xchg<mode>"
   [(set (match_operand:IMODE 0 "gr_register_operand" "=r")
         (match_operand:IMODE 1 "not_postinc_memory_operand" "+S"))
    (set (match_dup 1)
@@ -173,5 +186,6 @@ (define_expand "sync_lock_release<mode>"
 	(match_operand:IMODE 1 "gr_reg_or_0_operand" ""))]
   ""
 {
+  emit_insn (gen_memory_barrier ());
   gcc_assert (MEM_VOLATILE_P (operands[0]));
 })


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