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[Xtensa] handle MEM operands in new reload pattern


My change on 2008-09-05 added a new reload instruction pattern that handled SUBREG operands. At the time I couldn't find any code that exercised this instruction, but while running the testsuite with a different Xtensa processor configuration, I found a regression. Instead of the expected SUBREG, the reload pattern was given a MEM (with a narrower mode). I've committed this patch to fix it.

2008-09-19 Bob Wilson <bob.wilson@acm.org>

* config/xtensa/xtensa.md (reload<mode>_literal): Handle MEM operands.
Index: config/xtensa/xtensa.md
===================================================================
--- config/xtensa/xtensa.md	(revision 140493)
+++ config/xtensa/xtensa.md	(working copy)
@@ -898,13 +898,22 @@
   rtx lit, scratch;
   unsigned word_off, byte_off;
 
-  gcc_assert (GET_CODE (operands[1]) == SUBREG);
-  lit = SUBREG_REG (operands[1]);
-  scratch = operands[2];
-  word_off = SUBREG_BYTE (operands[1]) & ~(UNITS_PER_WORD - 1);
-  byte_off = SUBREG_BYTE (operands[1]) - word_off;
+  if (MEM_P (operands[1]))
+    {
+      lit = operands[1];
+      word_off = 0;
+      byte_off = 0;
+    }
+  else
+    {
+      gcc_assert (GET_CODE (operands[1]) == SUBREG);
+      lit = SUBREG_REG (operands[1]);
+      word_off = SUBREG_BYTE (operands[1]) & ~(UNITS_PER_WORD - 1);
+      byte_off = SUBREG_BYTE (operands[1]) - word_off;
+    }
 
   lit = adjust_address (lit, SImode, word_off);
+  scratch = operands[2];
   emit_insn (gen_movsi (scratch, lit));
   emit_insn (gen_mov<mode> (operands[0],
 			    gen_rtx_SUBREG (<MODE>mode, scratch, byte_off)));

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