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[patch, altivec] Fix PR tree-optimization/35642 - implement vect short mult
- From: Ira Rosen <IRAR at il dot ibm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: Dorit Nuzman <DORIT at il dot ibm dot com>
- Date: Thu, 4 Sep 2008 11:43:48 +0300
- Subject: [patch, altivec] Fix PR tree-optimization/35642 - implement vect short mult
Hi,
This patch implements vector multiplication of shorts to shorts for
Altivec.
The lack of such operation caused failure to vectorize four vectorizer
testcases after revision 133144, which changed the order of type
conversions and multiplications or removed conversions (before that patch,
those loops contained multiplications of ints, that is already supported by
Altivec).
Bootstrapped with vectorization enabled and tested on ppc-linux.
O.K. for mainline?
Thanks,
Dorit and Ira
ChangeLog:
PR tree-optimization/35642
* config/rs6000/altivec.md (mulv8hi3): Implement.
testsuite/ChangeLog:
PR tree-optimization/35642
* lib/target-supports.exp (check_effective_target_vect_short_mult):
Add powerpc.
Index: testsuite/lib/target-supports.exp
===================================================================
--- testsuite/lib/target-supports.exp (revision 139927)
+++ testsuite/lib/target-supports.exp (working copy)
@@ -2093,7 +2093,8 @@ proc check_effective_target_vect_short_m
if { [istarget ia64-*-*]
|| [istarget spu-*-*]
|| [istarget i?86-*-*]
- || [istarget x86_64-*-*] } {
+ || [istarget x86_64-*-*]
+ || [istarget powerpc*-*-*] } {
set et_vect_short_mult_saved 1
}
}
Index: config/rs6000/altivec.md
===================================================================
--- config/rs6000/altivec.md (revision 139927)
+++ config/rs6000/altivec.md (working copy)
@@ -647,6 +647,28 @@
DONE;
}")
+(define_expand "mulv8hi3"
+ [(use (match_operand:V8HI 0 "register_operand" ""))
+ (use (match_operand:V8HI 1 "register_operand" ""))
+ (use (match_operand:V8HI 2 "register_operand" ""))]
+ "TARGET_ALTIVEC"
+ "
+{
+ rtx odd = gen_reg_rtx (V4SImode);
+ rtx even = gen_reg_rtx (V4SImode);
+ rtx high = gen_reg_rtx (V4SImode);
+ rtx low = gen_reg_rtx (V4SImode);;
+
+ emit_insn (gen_altivec_vmulesh (even, operands[1], operands[2]));
+ emit_insn (gen_altivec_vmulosh (odd, operands[1], operands[2]));;
+
+ emit_insn (gen_altivec_vmrghw (high, even, odd));
+ emit_insn (gen_altivec_vmrglw (low, even, odd));;
+
+ emit_insn (gen_altivec_vpkuwum (operands[0], high, low));
+
+ DONE;
+}")
;; Fused multiply subtract
(define_insn "altivec_vnmsubfp"