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[PATCH] Enable -mcpu=power7 for PowerPC

This patch enables new -mcpu and -mtune options for POWER7.  The -mcpu=power7
option will be an alias for power6.  The affect of these options will be
expanded when more technical details are released by IBM.

Bootstrapped and regtested on powerpc64-linux.  Ok for mainline?

David, I didn't know exactly what to do with the aix*.h files and what
assembler options we should be passing.  Should we just be passing what
the power6 options are for each of those files?

Peter

	* config.in (HAVE_AS_VSX): New.
	* config.gcc: Add cpu_type power7.
	* configure.ac (HAVE_AS_VSX): Check for assembler support of the
	VSX instructions.
	* configure: Regenerate.
	* config/rs6000/rs6000.c (rs6000_override_options): Alias power7 to
	power6.
	* config/rs6000/rs6000.h (ASM_CPU_POWER7_SPEC): Define.
	(ASM_CPU_SPEC): Pass %(asm_cpu_power7) for -mcpu=power7.
	(EXTRA_SPECS): Add asm_cpu_power7 spec string.

Index: gcc/config.in
===================================================================
--- gcc/config.in	(revision 138568)
+++ gcc/config.in	(working copy)
@@ -377,6 +377,10 @@
 #undef HAVE_AS_TLS
 #endif
 
+/* Define if your assembler supports VSX instructions. */
+#ifndef USED_FOR_TARGET
+#undef HAVE_AS_VSX
+#endif
 
 /* Define to 1 if you have the `atoll' function. */
 #ifndef USED_FOR_TARGET
Index: gcc/config.gcc
===================================================================
--- gcc/config.gcc	(revision 138568)
+++ gcc/config.gcc	(working copy)
@@ -334,7 +334,7 @@ powerpc*-*-*)
 	extra_headers="ppc-asm.h altivec.h spe.h ppu_intrinsics.h paired.h spu2vmx.h vec_types.h si2vmx.h"
 	need_64bit_hwint=yes
 	case x$with_cpu in
-	    xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456]|xpower6x|xrs64a|xcell)
+	    xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[34567]|xpower6x|xrs64a|xcell)
 		cpu_is_64bit=yes
 		;;
 	esac
@@ -2842,7 +2842,7 @@ case "${target}" in
 				eval "with_$which=405"
 				;;
 			"" | common \
-			| power | power[23456] | power6x | powerpc | powerpc64 \
+			| power | power[234567] | power6x | powerpc | powerpc64 \
 			| rios | rios1 | rios2 | rsc | rsc1 | rs64a \
 			| 401 | 403 | 405 | 405fp | 440 | 440fp | 464 | 464fp \
 			| 505 | 601 | 602 | 603 | 603e | ec603e | 604 \
Index: gcc/configure.ac
===================================================================
--- gcc/configure.ac	(revision 138568)
+++ gcc/configure.ac	(working copy)
@@ -3006,6 +3006,21 @@ LCF0:
       [AC_DEFINE(HAVE_AS_DFP, 1,
 	  [Define if your assembler supports DFP instructions.])])
 
+    case $target in
+      *-*-aix*) conftest_s='	.machine "pwr7"
+	.csect .text[[PR]]
+	lxvd2x 1,2,3';;
+      *) conftest_s='	.machine power7
+	.text
+	lxvd2x 1,2,3';;
+    esac
+
+    gcc_GAS_CHECK_FEATURE([vector-scalar support],
+      gcc_cv_as_powerpc_vsx, [9,99,0], -a32,
+      [$conftest_s],,
+      [AC_DEFINE(HAVE_AS_VSX, 1,
+	  [Define if your assembler supports VSX instructions.])])
+
     gcc_GAS_CHECK_FEATURE([.gnu_attribute support],
       gcc_cv_as_powerpc_gnu_attribute, [2,18,0],,
       [.gnu_attribute 4,1],,
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c	(revision 138568)
+++ gcc/config/rs6000/rs6000.c	(working copy)
@@ -1507,6 +1507,9 @@ rs6000_override_options (const char *def
 	 {"power6x", PROCESSOR_POWER6,
 	  POWERPC_7400_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_MFCRF
 	  | MASK_POPCNTB | MASK_FPRND | MASK_CMPB | MASK_DFP | MASK_MFPGPR},
+	 {"power7", PROCESSOR_POWER5,
+	  POWERPC_7400_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_MFCRF
+	  | MASK_POPCNTB | MASK_FPRND | MASK_CMPB | MASK_DFP},
 	 {"powerpc", PROCESSOR_POWERPC, POWERPC_BASE_MASK},
 	 {"powerpc64", PROCESSOR_POWERPC64,
 	  POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64},
Index: gcc/config/rs6000/rs6000.h
===================================================================
--- gcc/config/rs6000/rs6000.h	(revision 138568)
+++ gcc/config/rs6000/rs6000.h	(working copy)
@@ -72,6 +72,13 @@
 #define ASM_CPU_POWER6_SPEC "-mpower4 -maltivec"
 #endif
 
+#ifdef HAVE_AS_VSX
+#define ASM_CPU_POWER7_SPEC "-mpower7"
+#else
+#define ASM_CPU_POWER7_SPEC "-mpower4 -maltivec"
+#endif
+
+
 /* Common ASM definitions used by ASM_SPEC among the various targets
    for handling -mcpu=xxx switches.  */
 #define ASM_CPU_SPEC \
@@ -92,6 +99,7 @@
 %{mcpu=power5+: %(asm_cpu_power5)} \
 %{mcpu=power6: %(asm_cpu_power6) -maltivec} \
 %{mcpu=power6x: %(asm_cpu_power6) -maltivec} \
+%{mcpu=power7: %(asm_cpu_power7)} \
 %{mcpu=powerpc: -mppc} \
 %{mcpu=rios: -mpwr} \
 %{mcpu=rios1: -mpwr} \
@@ -160,6 +168,7 @@
   { "cc1_cpu",			CC1_CPU_SPEC },				\
   { "asm_cpu_power5",		ASM_CPU_POWER5_SPEC },			\
   { "asm_cpu_power6",		ASM_CPU_POWER6_SPEC },			\
+  { "asm_cpu_power7",		ASM_CPU_POWER7_SPEC },			\
   SUBTARGET_EXTRA_SPECS
 
 /* -mcpu=native handling only makes sense with compiler running on
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