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Fix for GCC Bugzilla Bug 36133


Hi,

I'm hereby emailing you again, the test case and patch that are
included to the GCC bugtracker of Bug 36133.


Problem desciption:
---------------------------
GCC 68k/Coldfire backends creates unnecessary TST instructions.
On the 68k/Coldfire many instructions do set the Condition Codes automaticly.
GCC is not aware of this and GCC creates unneeded TST instructions to
create these conditions code again.


Fix:
----
Add instrutcition definitions to machine description to inform GCC
about the instructions setting the conditions codes.


How to reproduce:
-------------------------
Compile this example function withand look at the produces ASM code.
m68k-linux-gnu-gcc -mcpu=54455 -o example -Os -fomit-frame-pointer example.c
void * copy_32x4a(void *destparam, const void *srcparam, size_t size)
{
       int *dest = destparam;
       const int *src = srcparam;
       int size32;
       size32 = size / 16;
       for (; size32; size32--) {
               *dest++ = *src++;
               *dest++ = *src++;
               *dest++ = *src++;
               *dest++ = *src++;
       }
}

Look at the code and see that GCC is not aware that LSRL and the SUBQL
do both set the condition codes already, there is no need for using an
extra TST instruction at all.

Please apply the patch and recompile.
GCC is now aware that the LSR instruction does set the CC already and
will not create the unneeded TST.

Please mind that the attached patch will fix only the SHIFT instruction.
Can you use this example for the other 68K instructions, or shall I
help with this?


Kind regards

Gunnar von Boehn
Index: gcc/config/m68k/m68k.md
===================================================================
*** gcc/config/m68k/m68k.md.orig        2008-05-30 10:00:55.000000000 +0200
--- gcc/config/m68k/m68k.md     2008-06-04 17:01:11.000000000 +0200
***************
*** 5198,5203 ****
--- 5198,5215 ----
    [(set_attr "type" "shift")
     (set_attr "opy" "2")])

+ (define_insn "*lshrsi3_cc"
+   [(set (cc0)
+       (lshiftrt:SI (match_operand:SI 1 "register_operand" "0")
+                    (match_operand:SI 2 "general_operand" "dI")))
+    (set (match_operand:SI 0 "register_operand" "=d")
+       (lshiftrt:SI (match_dup 1)
+                    (match_dup 2)))]
+   ""
+   "lsr%.l %2,%0"
+   [(set_attr "type" "shift")
+    (set_attr "opy" "2")])
+
  (define_insn "lshrhi3"
    [(set (match_operand:HI 0 "register_operand" "=d")
        (lshiftrt:HI (match_operand:HI 1 "register_operand" "0")

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