This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [MIPS][LS2][2/5] Vector intrinsics


Hi every one,
There are something special with Loongson.
See below. (Extracted from binutils-2.18.50.0.5/opcodes/mips-opc.c) I
wonder if these instruction would be in gcc.
210:{"add",     "D,S,T",        0x4b40000c,     0xffe0003f,
RD_S|RD_T|WR_D|FP_S,    0,      IL2F    },
240:{"and",     "D,S,T",        0x4bc00002,     0xffe0003f,
RD_S|RD_T|WR_D|FP_D,    0,      IL2F    },
546:{"dadd",    "D,S,T",        0x4b60000c,     0xffe0003f,
RD_S|RD_T|WR_D|FP_D,    0,      IL2F    },
660:{"dsll",    "D,S,T",        0x4b20000e,     0xffe0003f,
RD_S|RD_T|WR_D|FP_D,    0,      IL2F    },
667:{"dsra",    "D,S,T",        0x4b60000f,     0xffe0003f,
RD_S|RD_T|WR_D|FP_D,    0,      IL2F    },
674:{"dsrl",    "D,S,T",        0x4b20000f,     0xffe0003f,
RD_S|RD_T|WR_D|FP_D,    0,      IL2F    },
678:{"dsub",    "D,S,T",        0x4b60000d,     0xffe0003f,
RD_S|RD_T|WR_D|FP_D,    0,      IL2F    },
1041:{"nor",    "D,S,T",        0x4ba00002,     0xffe0003f,
RD_S|RD_T|WR_D|FP_D,    0,      IL2F    },
1051:{"or",     "D,S,T",        0x4b20000c,     0xffe0003f,
RD_S|RD_T|WR_D|FP_D,    0,      IL2F    },
1175:{"seq",    "S,T",          0x4ba0000c,     0xffe007ff,
RD_S|RD_T|WR_CC|FP_D,   0,      IL2F    },
1203:{"sle",    "S,T",          0x4ba0000e,     0xffe007ff,
RD_S|RD_T|WR_CC|FP_D,   0,      IL2F    },
1207:{"sleu",   "S,T",          0x4b80000e,     0xffe007ff,
RD_S|RD_T|WR_CC|FP_D,   0,      IL2F    },
1212:{"sll",    "D,S,T",        0x4b00000e,     0xffe0003f,
RD_S|RD_T|WR_D|FP_D,    0,      IL2F    },
1220:{"slt",    "S,T",          0x4ba0000d,     0xffe007ff,
RD_S|RD_T|WR_CC|FP_D,   0,      IL2F    },
1226:{"sltu",   "S,T",          0x4b80000d,     0xffe007ff,
RD_S|RD_T|WR_CC|FP_D,   0,      IL2F    },
1236:{"sra",    "D,S,T",        0x4b40000f,     0xffe0003f,
RD_S|RD_T|WR_D|FP_D,    0,      IL2F    },
1242:{"srl",    "D,S,T",        0x4b00000f,     0xffe0003f,
RD_S|RD_T|WR_D|FP_D,    0,      IL2F    },
1252:{"sub",    "D,S,T",        0x4b40000d,     0xffe0003f,
RD_S|RD_T|WR_D|FP_S,    0,      IL2F    },
1259:{"sub.ps",  "D,V,T",       0x46c00001, 0xffe0003f,
WR_D|RD_S|RD_T|FP_D,    0,              I5_33|IL2F      },
1269:{"subu",   "D,S,T",        0x4b00000d,     0xffe0003f,
RD_S|RD_T|WR_D|FP_S,    0,      IL2F    },
1372:{"xor",    "D,S,T",        0x4b800002,     0xffe0003f,
RD_S|RD_T|WR_D|FP_D,    0,      IL2F    },

Those instruction is designed for using FPU to to do some easy task of
ALU thus reducing usage of m[ft]c1.
There are both mov.d and mov.ps in Loongson and one more: "or" (1051) on FPU.

James Ruan


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]