[PATCH][MIPS] mwarn-framesize= option

[Maxim Kuvyrkov <maxim at codesourcery dot com>]

Hello,

Here is patch to add -mwarn-framesize=<size> option to MIPS.  This 
option is useful when developing code for environments with limited or 
no stack, e.g., BIOS.  One can use this option to diagnose any C 
constructs that use stack memory and fix them to use only registers.

The implementation was copied from S390 and CRIS back-ends.

OK for trunk?


Thanks,

Maxim
2008-06-03  Maxim Kuvyrkov  <maxim@codesourcery.com>

	* doc/invoke.texi (mwarn-framesize): Document option.
	* config/mips/mips.opt (mwarn-framesize): Add option.
	* config/mips/mips.c (mips_warn_framesize): New static variable.
	(mips_handle_option): Handle mwarn-framesize.
	(mips_expand_prologue): Emit warning if frame size exceeds specified
	value.

Index: gcc/doc/invoke.texi
===================================================================
--- gcc/doc/invoke.texi	(revision 136328)
+++ gcc/doc/invoke.texi	(working copy)
@@ -651,7 +651,8 @@ Objective-C and Objective-C++ Dialects}.
 -mflush-func=@var{func}  -mno-flush-func @gol
 -mbranch-cost=@var{num}  -mbranch-likely  -mno-branch-likely @gol
 -mfp-exceptions -mno-fp-exceptions @gol
--mvr4130-align -mno-vr4130-align}
+-mvr4130-align -mno-vr4130-align @gol
+-mwarn-framesize=@var{framesize}}
 
 @emph{MMIX Options}
 @gccoptlist{-mlibfuncs  -mno-libfuncs  -mepsilon  -mno-epsilon  -mabi=gnu @gol
@@ -12578,6 +12579,13 @@ thinks should execute in parallel.
 This option only has an effect when optimizing for the VR4130.
 It normally makes code faster, but at the expense of making it bigger.
 It is enabled by default at optimization level @option{-O3}.
+
+@item -mwarn-framesize=@var{framesize}
+@opindex mwarn-framesize
+Emit a compile-time warning if the current function exceeds the given
+frame size.  This is intended to help identify functions which
+may cause a stack overflow in run-time environments with limited or
+absent stack, e.g., BIOS. 
 @end table
 
 @node MMIX Options
Index: gcc/config/mips/mips.opt
===================================================================
--- gcc/config/mips/mips.opt	(revision 136328)
+++ gcc/config/mips/mips.opt	(working copy)
@@ -268,6 +268,10 @@ mvr4130-align
 Target Report Mask(VR4130_ALIGN)
 Perform VR4130-specific alignment optimizations
 
+mwarn-framesize=
+Target RejectNegative Joined
+Warn if a single function's framesize exceeds the given framesize
+
 mxgot
 Target Report Var(TARGET_XGOT)
 Lift restrictions on GOT size
Index: gcc/config/mips/mips.c
===================================================================
--- gcc/config/mips/mips.c	(revision 136328)
+++ gcc/config/mips/mips.c	(working copy)
@@ -455,6 +455,10 @@ static int mips_base_align_functions; /*
 /* The -mcode-readable setting.  */
 enum mips_code_readable_setting mips_code_readable = CODE_READABLE_YES;
 
+/* If size of stack frame exceeds this value, compiler will emit
+   warning message.  */
+static HOST_WIDE_INT mips_warn_framesize = -1;
+
 /* Index [M][R] is true if register R is allowed to hold a value of mode M.  */
 bool mips_hard_regno_mode_ok[(int) MAX_MACHINE_MODE][FIRST_PSEUDO_REGISTER];
 
@@ -8552,6 +8556,11 @@ mips_expand_prologue (void)
   frame = &cfun->machine->frame;
   size = frame->total_size;
 
+  if (mips_warn_framesize >= 0
+      && size > mips_warn_framesize)
+    warning (0, "frame size of %qs is " HOST_WIDE_INT_PRINT_DEC " bytes", 
+ 	     current_function_name (), size);
+
   /* Save the registers.  Allocate up to MIPS_MAX_FIRST_STACK_STEP
      bytes beforehand; this is enough to cover the register save area
      without going out of range.  */
@@ -12172,6 +12181,9 @@ mips_handle_option (size_t code, const c
 	return false;
       return true;
 
+    case OPT_mwarn_framesize_:
+      return sscanf (arg, HOST_WIDE_INT_PRINT_DEC, &mips_warn_framesize) == 1;
+
     default:
       return true;
     }