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[PATCH, i386]: Remove SECONDARY_OUTPUT_RELOAD_CLASS
- From: Uros Bizjak <ubizjak at gmail dot com>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Sun, 18 May 2008 15:41:41 +0200
- Subject: [PATCH, i386]: Remove SECONDARY_OUTPUT_RELOAD_CLASS
Hello!
This patch removes obsolete SECONDARY_OUTPUT_RELOAD_CLASS and introduces
equivalent TARGET_SECONDARY_RELOAD target hook.
2008-05-18 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.c (ix86_secondary_reload): New static function.
(TARGET_SECONDARY_RELOAD): New define.
* config/i386/i386.h (SECONDARY_OUTPUT_RELOAD_CLASS): Remove.
* config/i386/i386.md (reload_outqi): Remove.
Patch was bootstrapped and regression tested on x86_64-pc-linux-gnu
{,-m32}. Patch is committed to mainline.
Uros.
Index: config/i386/i386.h
===================================================================
--- config/i386/i386.h (revision 135493)
+++ config/i386/i386.h (working copy)
@@ -1524,15 +1524,6 @@ enum reg_class
? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
: MODE)
-/* QImode spills from non-QI registers need a scratch. This does not
- happen often -- the only example so far requires an uninitialized
- pseudo. */
-
-#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \
- (((CLASS) == GENERAL_REGS || (CLASS) == LEGACY_REGS \
- || (CLASS) == INDEX_REGS) && !TARGET_64BIT && (MODE) == QImode \
- ? Q_REGS : NO_REGS)
-
/* Return the maximum number of consecutive registers
needed to represent mode MODE in a register of class CLASS. */
/* On the 80386, this is the size of MODE in words,
Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md (revision 135493)
+++ config/i386/i386.md (working copy)
@@ -1810,25 +1810,6 @@
]
(const_string "QI")))])
-(define_expand "reload_outqi"
- [(parallel [(match_operand:QI 0 "" "=m")
- (match_operand:QI 1 "register_operand" "r")
- (match_operand:QI 2 "register_operand" "=&q")])]
- ""
-{
- rtx op0, op1, op2;
- op0 = operands[0]; op1 = operands[1]; op2 = operands[2];
-
- gcc_assert (!reg_overlap_mentioned_p (op2, op0));
- if (! q_regs_operand (op1, QImode))
- {
- emit_insn (gen_movqi (op2, op1));
- op1 = op2;
- }
- emit_insn (gen_movqi (op0, op1));
- DONE;
-})
-
(define_insn "*swapqi_1"
[(set (match_operand:QI 0 "register_operand" "+r")
(match_operand:QI 1 "register_operand" "+r"))
Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c (revision 135493)
+++ config/i386/i386.c (working copy)
@@ -22023,6 +22023,34 @@ ix86_preferred_output_reload_class (rtx
return regclass;
}
+static enum reg_class
+ix86_secondary_reload (bool in_p, rtx x, enum reg_class class,
+ enum machine_mode mode,
+ secondary_reload_info *sri ATTRIBUTE_UNUSED)
+{
+ /* QImode spills from non-QI registers require
+ intermediate register on 32bit targets. */
+ if (!in_p && mode == QImode && class == NON_Q_REGS
+ && !TARGET_64BIT)
+ {
+ int regno;
+
+ if (REG_P (x))
+ regno = REGNO (x);
+ else
+ regno = -1;
+
+ if (regno >= FIRST_PSEUDO_REGISTER || GET_CODE (x) == SUBREG)
+ regno = true_regnum (x);
+
+ /* Return Q_REGS if the operand is in memory. */
+ if (regno == -1)
+ return Q_REGS;
+ }
+
+ return NO_REGS;
+}
+
/* If we are copying between general and FP registers, we need a memory
location. The same is true for SSE and MMX registers.
@@ -25878,6 +25906,9 @@ x86_builtin_vectorization_cost (bool run
#undef TARGET_FUNCTION_VALUE
#define TARGET_FUNCTION_VALUE ix86_function_value
+#undef TARGET_SECONDARY_RELOAD
+#define TARGET_SECONDARY_RELOAD ix86_secondary_reload
+
#undef TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST
#define TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST x86_builtin_vectorization_cost