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Re: Update SSE5 vector multiplication, shift, rotate, take 2


On Thu, May 8, 2008 at 2:24 PM, Michael Meissner
<michael.meissner@amd.com> wrote:
> BTW, the SPU current without patches aborts if you try to code up a rotate,
> just like the current x86 with -msse5 does without my patches.  With my
> patches, it looks like it generates a vector rotate:

I removed the assert and it worked,  the assert was added to make sure
we don't get partial modes but it really should be also checking if it
is not a VECTOR_TYPE.  This assert was added for PR 34971.

Thanks,
Andrew Pinski


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