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On Mon, 5 May 2008, Edmar Wienskoski-RA8797 wrote:I built the compiler with "--with-cpu=e500mc", used the result to build glibc, and run all testsuite
Freescale would like to contribute this patch to gcc. It creates a scheduler
and proper default flags for the e500mc core.
Could you describe how this has been tested?
You're adding a processor with both ISEL and FPRs, a new combination. IfYes. It is a new chip that has both.
you're not using a configuration that uses the e500.h header, TARGET_ISEL is just defined to be 0, so the enabling of ISEL is ineffective. If youRight, my error. I did not verify if the resulting compiler actually generated an isel instruction.
are using this header in your testing, you get the error from CHECK_E500_OPTIONS that this combination isn't supported. The only reason not to get that error would be that after you set rs6000_isel there is code that doesI will work on this..
if (TARGET_E500) { ... } else if (rs6000_select[1].string != NULL) { ... if (!rs6000_explicit_options.isel) rs6000_isel = 0; }
and so rs6000_isel would be reset again - and this comes before the CHECK_E500_OPTIONS. (The new processor doesn't fall within the existing TARGET_E500 definition; whether it should depends on how it relates to the few uses of this macro for the presence of such things as string instructions and lwsync.)
So you need to make sure you test for a configuration where ISEL is supported at all (one using e500.h); remove the error for the ISEL, FPRs combination; remove the disabling of ISEL for explicit use of this processor; and fix any ICEs arising from the combination. (The error was added because of very simple code producing an ICE with the combination in the past, when the combination arose through user error.)
Thanks, Edmar
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