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[4.3]: PATCH: PR target/36095: __builtin_ia32_crc32di shouldn't defined in 32bit
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Wed, 30 Apr 2008 23:03:18 -0700
- Subject: [4.3]: PATCH: PR target/36095: __builtin_ia32_crc32di shouldn't defined in 32bit
__builtin_ia32_crc32di is defined in 32bit by accident. Gcc 4.4
is fixed by
http://gcc.gnu.org/ml/gcc-patches/2008-05/msg00010.html
Here is a patch for 4.3.
H.J.
---
2008-04-30 H.J. Lu <hongjiu.lu@intel.com>
PR target/36095
* config/i386/i386.c (bdesc_crc32): Remove OPTION_MASK_ISA_64BIT
from IX86_BUILTIN_CRC32QI. Add OPTION_MASK_ISA_64BIT to
IX86_BUILTIN_CRC32DI.
(ix86_init_mmx_sse_builtins): Add OPTION_MASK_ISA_64BIT to
IX86_BUILTIN_CRC32DI.
* doc/extend.texi: Correct __builtin_ia32_crc32di.
Index: doc/extend.texi
===================================================================
--- doc/extend.texi (revision 134728)
+++ doc/extend.texi (working copy)
@@ -7940,7 +7940,7 @@ Generates the @code{crc32b} machine inst
Generates the @code{crc32w} machine instruction.
@item unsigned int __builtin_ia32_crc32si (unsigned int, unsigned int)
Generates the @code{crc32l} machine instruction.
-@item unsigned long long __builtin_ia32_crc32di (unsigned int, unsigned long long)
+@item unsigned long long __builtin_ia32_crc32di (unsigned long long, unsigned long long)
@end table
The following built-in functions are changed to generate new SSE4.2
Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c (revision 134728)
+++ config/i386/i386.c (working copy)
@@ -17891,10 +17891,10 @@ static const struct builtin_description
static const struct builtin_description bdesc_crc32[] =
{
/* SSE4.2 */
- { OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_64BIT, CODE_FOR_sse4_2_crc32qi, 0, IX86_BUILTIN_CRC32QI, UNKNOWN, 0 },
+ { OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_crc32qi, 0, IX86_BUILTIN_CRC32QI, UNKNOWN, 0 },
{ OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_crc32hi, 0, IX86_BUILTIN_CRC32HI, UNKNOWN, 0 },
{ OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_crc32si, 0, IX86_BUILTIN_CRC32SI, UNKNOWN, 0 },
- { OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_crc32di, 0, IX86_BUILTIN_CRC32DI, UNKNOWN, 0 },
+ { OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_64BIT, CODE_FOR_sse4_2_crc32di, 0, IX86_BUILTIN_CRC32DI, UNKNOWN, 0 },
};
/* SSE builtins with 3 arguments and the last argument must be an immediate or xmm0. */
@@ -19542,7 +19542,7 @@ ix86_init_mmx_sse_builtins (void)
long_long_unsigned_type_node,
long_long_unsigned_type_node,
NULL_TREE);
- def_builtin_const (OPTION_MASK_ISA_SSE4_2, "__builtin_ia32_crc32di", ftype, IX86_BUILTIN_CRC32DI);
+ def_builtin_const (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_64BIT, "__builtin_ia32_crc32di", ftype, IX86_BUILTIN_CRC32DI);
/* AES */
if (TARGET_AES)