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Re: [RFA] The Integrated Register Allocator
- From: "Andrew Pinski" <pinskia at gmail dot com>
- To: "Vladimir Makarov" <vmakarov at redhat dot com>
- Cc: gcc-patches <gcc-patches at gcc dot gnu dot org>
- Date: Mon, 7 Apr 2008 17:50:48 -0700
- Subject: Re: [RFA] The Integrated Register Allocator
- References: <47F1A9D4.1010100@redhat.com>
On Mon, Mar 31, 2008 at 8:19 PM, Vladimir Makarov <vmakarov@redhat.com> wrote:
> Hi, here is the Integrated Register Allocator (IRA). To make review
> more convenient, I am submitting IRA as a patch relative to recent
> trunk (at revision 133688).
This simple patch makes IRA work for spu-elf:
Index: gcc/gcc/config/spu/spu.h
===================================================================
--- gcc/gcc/config/spu/spu.h (revision 133985)
+++ gcc/gcc/config/spu/spu.h (working copy)
@@ -224,6 +224,9 @@ enum reg_class {
LIM_REG_CLASSES
};
+/* SPU is simple, it really only have one class of registers. */
+#define IRA_COVER_CLASSES { GENERAL_REGS, LIM_REG_CLASSES }
+
#define N_REG_CLASSES (int) LIM_REG_CLASSES
#define REG_CLASS_NAMES \
---- CUT ----
But I am getting more register to register moves with IRA than with the old RA.
For a simple testcase (which is internal, I will see if I can clean it
up and let you have it), I am getting about 192 more register to
register moves.
SPU should be a good model for a good processor when it comes register
allocation since it has no special registers or special constraints on
its instructions and there is only one register class.
Thanks,
Andrew Pinski