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PATCH, rs6000: pass correct -m option to gas


The PowerPC port currently passes -mpower4 to gas when any of the
options -mcpu=power5, -mcpu=power5+, -mcpu=power6 or -mcpu=power6x are
given.  This relies on also invoking the assembler with -many to accept
any extended mnemonics for power5 or power6.  Unfortunately, this does
not permit the assembler to perform any target-specific optimisations.

This patch adjusts the specs strings so that for various -mcpu options,
the correct corresponding -m option is passed to gas.  Tested with some
test runs with -v -### and inspection.

Okay for the trunk?  Are the HAVE_AS macros I've chosen for the target
feature tests sufficient?

Cheers, Ben


commit 273e38ff95fa8e8c6401597e7eb5e2d801d1414c
Author: Ben Elliston <bje@au.ibm.com>
Date:   Wed Feb 6 16:48:59 2008 +1100

    Allow -mcpu=power{5,6} to pass correct -m options to gas.
    
    2008-02-06  Ben Elliston  <bje@au.ibm.com>
    
            * config/rs6000/rs6000.h (ASM_CPU_POWER5_SPEC): Define.
            (ASM_CPU_POWER6_SPEC): Likewise.
            (ASM_CPU_SPEC): Pass %(asm_cpu_power5) for -mcpu=power5.
            Likewise, pass %(asm_cpu_power6) for -mcpu=power6.
            (EXTRA_SPECS): Add asm_cpu_power5, asm_cpu_power6 spec strings.

diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 6a64eae..2919ee6 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -60,6 +60,18 @@
 #define TARGET_PAIRED_FLOAT 0
 #endif
 
+#ifdef HAVE_AS_MFCRF
+#define ASM_CPU_POWER5_SPEC "-mpower5"
+#else
+#define ASM_CPU_POWER5_SPEC "-mpower4"
+#endif
+
+#ifdef HAVE_AS_DFP
+#define ASM_CPU_POWER6_SPEC "-mpower6 -maltivec"
+#else
+#define ASM_CPU_POWER6_SPEC "-mpower4 -maltivec"
+#endif
+
 /* Common ASM definitions used by ASM_SPEC among the various targets
    for handling -mcpu=xxx switches.  */
 #define ASM_CPU_SPEC \
@@ -76,10 +88,10 @@
 %{mcpu=power2: -mpwrx} \
 %{mcpu=power3: -mppc64} \
 %{mcpu=power4: -mpower4} \
-%{mcpu=power5: -mpower4} \
-%{mcpu=power5+: -mpower4} \
-%{mcpu=power6: -mpower4 -maltivec} \
-%{mcpu=power6x: -mpower4 -maltivec} \
+%{mcpu=power5: %(asm_cpu_power5)} \
+%{mcpu=power5+: %(asm_cpu_power5)} \
+%{mcpu=power6: %(asm_cpu_power6) -maltivec} \
+%{mcpu=power6x: %(asm_cpu_power6) -maltivec} \
 %{mcpu=powerpc: -mppc} \
 %{mcpu=rios: -mpwr} \
 %{mcpu=rios1: -mpwr} \
@@ -141,6 +153,8 @@
   { "asm_cpu",                 ASM_CPU_SPEC },                         \
   { "asm_default",             ASM_DEFAULT_SPEC },                     \
   { "cc1_cpu",                 CC1_CPU_SPEC },                         \
+  { "asm_cpu_power5",          ASM_CPU_POWER5_SPEC },                  \
+  { "asm_cpu_power6",          ASM_CPU_POWER6_SPEC },                  \
   SUBTARGET_EXTRA_SPECS
 
 /* -mcpu=native handling only makes sense with compiler running on



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