New port submission - picoChip

[Hariharan <hariharans at picochip dot com>]

Hello,
I would like to submit the picoChip port of GCC to be a part of GCC 
mainline. picoChip produces a 16-bit DSP processor which is popular in 
the wireless infrastructure domain. picoArray processors are used by 
over 100 companies including major companies such as Intel, Huawei, 
Airspan, Alcatel-Lucent, ubiquisys and ip.access as key components in 
WiMAX and WCDMA systems.

This port has been in active development and usage in picoChip for the 
last 6 years. Daniel Towner and myself contributed towards this port and 
we will act as the official maintainers of the port.

I believe that we have conformed, by and large, to the "Anatomy of a 
target backend" and the "New port guidelines" on the Gcc mailing list. 
Please let me know if there are any things in the port that needs to be 
changed.

There is a "picoGcc Reference Manual" in 
http://www.picochip.com/downloads/picoGcc_reference_manual.pdf  which 
gives an overview of the processor, detailed description of the ISA, ABI 
and assembler directives.

We intend this to be a "C" only port.

Please note that successful build of this port for libgcc depends on the 
earlier bug fix patch that i have submitted. 
http://gcc.gnu.org/ml/gcc-patches/2008-02/msg00574.html

Regards
Hari

Attachments :
patch_file : patch relative to gcc.4.3 mainline sources.
t-picochip : This file needs to go to libgcc/config under a new 
directory called "picochip". This seems to be the new way of doing 
things for libgcc.
picochip.tgz : This is the actual port. It needs to go in gcc/config.




Index: libgcc/config.host
===================================================================
--- libgcc/config.host	(revision 132093)
+++ libgcc/config.host	(working copy)
@@ -464,6 +464,8 @@
 	;;
 mt-*-elf)
         ;;
+picochip-*-*)
+        ;;
 pdp11-*-bsd)
         ;;
 pdp11-*-*)
Index: gcc/doc/extend.texi
===================================================================
--- gcc/doc/extend.texi	(revision 132093)
+++ gcc/doc/extend.texi	(working copy)
@@ -6695,6 +6695,7 @@
 * X86 Built-in Functions::
 * MIPS DSP Built-in Functions::
 * MIPS Paired-Single Support::
+* picoChip Built-in Functions::
 * PowerPC AltiVec Built-in Functions::
 * SPARC VIS Built-in Functions::
 * SPU Built-in Functions::
@@ -8812,6 +8813,42 @@
 @end smallexample
 @end table
 
+@node picoChip Built-in Functions
+@subsection picoChip Built-in Functions
+
+GCC provides an interface to selected machine instructions from the
+picoChip instruction set.
+
+@table @code
+@item int __builtin_sbc (int @var{value})
+Sign bit count.  Return the number of consecutive bits in @var{value}
+which have the same value as the sign-bit.  The result is the number of
+leading sign bits minus one, giving the number of redundant sign bits in
+@var{value}.
+
+@item int __builtin_byteswap (int @var{value})
+Byte swap.  Return the result of swapping the upper and lower bytes of
+@var{value}.
+
+@item int __builtin_brev (int @var{value})
+Bit reversal.  Return the result of reversing the bits in
+@var{value}.  Bit 15 is swapped with bit 0, bit 14 is swapped with bit 1,
+and so on.
+
+@item int __builtin_adds (int @var{x}, int @var{y})
+Saturating addition.  Return the result of adding @var{x} and @var{y},
+storing the value 32767 if the result overflows.
+
+@item int __builtin_subs (int @var{x}, int @var{y})
+Saturating subtraction.  Return the result of subtracting @var{y} from
+@var{x}, storing the value -32768 if the the result overflows.
+
+@item void __builtin_halt (void)
+Halt.  The processor will stop execution.  This built-in is useful for
+implementing assertions.
+
+@end table
+
 @node PowerPC AltiVec Built-in Functions
 @subsection PowerPC AltiVec Built-in Functions
 
Index: gcc/doc/invoke.texi
===================================================================
--- gcc/doc/invoke.texi	(revision 132093)
+++ gcc/doc/invoke.texi	(working copy)
@@ -674,6 +674,10 @@
 -mbranch-expensive  -mbranch-cheap @gol
 -msplit  -mno-split  -munix-asm  -mdec-asm}
 
+@emph{picoChip Options}
+@gccoptlist{-mae=@var{ae_type} -mvliw-lookahead=@var{N}
+-msymbol-as-address -mno-inefficient-warnings}
+
 @emph{PowerPC Options}
 See RS/6000 and PowerPC Options.
 
@@ -8233,6 +8237,7 @@
 * MN10300 Options::
 * MT Options::
 * PDP-11 Options::
+* picoChip Options::
 * PowerPC Options::
 * RS/6000 and PowerPC Options::
 * S/390 and zSeries Options::
@@ -12641,6 +12646,54 @@
 PDP-11 target other than @samp{pdp11-*-bsd}.
 @end table
 
+@node picoChip Options
+@subsection picoChip Options
+@cindex picoChip options
+
+These @samp{-m} options are defined for picoChip implementations:
+
+@table @gcctabopt
+
+@item -mae=@var{ae_type}
+@opindex mcpu
+Set the instruction set, register set, and instruction scheduling
+parameters for array element type @var{ae_type}.  Supported values
+for @var{ae_type} are @samp{ANY}, @samp{MUL}, and @samp{MAC}.
+
+@option{-mae=ANY} selects a completely generic AE type.  Code
+generated with this option will run on any of the other AE types.  The
+code will not be as efficient as it would be if compiled for a specific
+AE type, and some types of operation (e.g., multiplication) will not
+work properly on all types of AE.
+
+@option{-mae=MUL} selects a MUL AE type.  This is the most useful AE type
+for copiled code, and is the default.
+
+@option{-mae=MAC} selects a DSP-style MAC AE.  Code compiled with this
+option may suffer from poor performance of byte (char) manipulation,
+since the DSP AE does not provide hardware support for byte load/stores.
+
+@item -msymbol-as-address
+Enable the compiler to directly use a symbol name as an address in a
+load/store instruction, without first loading it into a
+register.  Typically, the use of this option will generate larger
+programs, which run faster than when the option isn't used.  However, the
+results vary from program to program, so it is left as a user option,
+rather than being permanently enabled.
+
+@item -mno-inefficient-warnings
+Disables warnings about the generation of inefficient code.  These
+warnings can be generated, for example, when compiling code which
+performs byte-level memory operations on the MAC AE type.  The MAC AE has
+no hardware support for byte-level memory operations, so all byte
+load/stores must be synthesised from word load/store operations.  This is
+inefficient and a warning will be generated indicating to the programmer
+that they should rewrite the code to avoid byte operations, or to target
+an AE type which has the necessary hardware support.  This option enables
+the warning to be turned off.
+
+@end table
+
 @node PowerPC Options
 @subsection PowerPC Options
 @cindex PowerPC options
Index: gcc/doc/contrib.texi
===================================================================
--- gcc/doc/contrib.texi	(revision 132093)
+++ gcc/doc/contrib.texi	(working copy)
@@ -917,6 +917,10 @@
 Leonard Tower wrote parts of the parser, RTL generator, and RTL
 definitions, and of the VAX machine description.
 
+@item 
+Daniel Towner and Hariharan Sandanagobalane contributed and 
+maintain the picoChip port.
+
 @item
 Tom Tromey for internationalization support and for his many Java
 contributions and libgcj maintainership.
Index: gcc/doc/md.texi
===================================================================
--- gcc/doc/md.texi	(revision 132093)
+++ gcc/doc/md.texi	(working copy)
@@ -1852,6 +1852,46 @@
 A register indirect memory operand
 @end table
 
+@item picoChip family---@file{picochip.h}
+@table @code
+@item k
+Stack register.
+
+@item f
+Pointer register.  A register which can be used to access memory without
+supplying an offset.  Any other register can be used to access memory,
+but will need a constant offset.  In the case of the offset being zero,
+it is more efficient to use a pointer register, since this reduces code
+size.
+
+@item t
+A twin register.  A register which may be paired with an adjacent
+register to create a 32-bit register.
+
+@item a
+Any absolute memory address (e.g., symbolic constant, symbolic
+constant + offset).
+
+@item I
+4-bit signed integer.
+
+@item J
+4-bit unsigned integer.
+
+@item K
+8-bit signed integer.
+
+@item M
+Any constant whose absolute value is no greater than 4-bits.
+
+@item N
+10-bit signed integer
+
+@item O
+16-bit signed integer.
+
+@end table
+
 @item PowerPC and IBM RS6000---@file{config/rs6000/rs6000.h}
 @table @code
 @item b
Index: gcc/config.gcc
===================================================================
--- gcc/config.gcc	(revision 132093)
+++ gcc/config.gcc	(working copy)
@@ -339,6 +339,9 @@
 	cpu_type=mips
 	need_64bit_hwint=yes
 	;;
+picochip-*-*)
+        cpu_type=picochip
+        ;;
 powerpc*-*-*)
 	cpu_type=rs6000
 	extra_headers="ppc-asm.h altivec.h spe.h ppu_intrinsics.h paired.h spu2vmx.h vec_types.h si2vmx.h"
@@ -1841,6 +1844,9 @@
 pdp11-*-*)
 	use_fixproto=yes
 	;;
+picochip-*)
+        # Nothing special
+        ;;
 # port not yet contributed
 #powerpc-*-openbsd*)
 #	tmake_file="${tmake_file} rs6000/t-fprules rs6000/t-fprules-fpbit "

Attachment: picochip.tgz
Description: application/compressed-tar

# Compile the extra library functions.

LIB2FUNCS_EXTRA = \
	$(srcdir)/config/picochip/libgccExtras/ashrsi3.asm 		\
	$(srcdir)/config/picochip/libgccExtras/ashlsi3.asm		\
	$(srcdir)/config/picochip/libgccExtras/divmodhi4.asm 		\
	$(srcdir)/config/picochip/libgccExtras/udivmodhi4.asm 		\
	$(srcdir)/config/picochip/libgccExtras/divmodsi4.asm 		\
	$(srcdir)/config/picochip/libgccExtras/udivmodsi4.asm 		\
	$(srcdir)/config/picochip/libgccExtras/divmod15.asm 		\
	$(srcdir)/config/picochip/libgccExtras/ucmpsi2.asm 		\
	$(srcdir)/config/picochip/libgccExtras/cmpsi2.asm 		\
	$(srcdir)/config/picochip/libgccExtras/clz32.asm			\
	$(srcdir)/config/picochip/libgccExtras/adddi3.asm			\
	$(srcdir)/config/picochip/libgccExtras/subdi3.asm			\
	$(srcdir)/config/picochip/libgccExtras/lshrsi3.asm		\
	$(srcdir)/config/picochip/libgccExtras/parityhi2.asm		\
	$(srcdir)/config/picochip/libgccExtras/popcounthi2.asm

# Prevent some of the more complicated libgcc functions from being
# compiled. This is because they are generally too big to fit into an
# AE anyway, so there is no point in having them. Also, some don't
# compile properly so we'll ignore them for the moment.

LIB1ASMFUNCS = _mulsc3 _divsc3
LIB1ASMSRC = picochip/libgccExtras/fake_libgcc.asm

# Turn off the building of exception handling libraries.
LIB2ADDEH =
LIB2ADDEHDEP =

# Turn off ranlib on target libraries.
RANLIB_FOR_TARGET = cat

# Special libgcc setup. Make single/double floating point the same,
# and use our own include files.
TARGET_LIBGCC2_CFLAGS = -DDF=SF -I../../includes/

# Switch off all debugging for the embedded libraries.
# (embedded processors need small libraries by default).  
# NOTE: If the debug level is increased, turn off instruction scheduling.
LIBGCC2_DEBUG_CFLAGS = -g0

# Build all combinations of library for different multiply units, and
# presence/absence of byte access.
MULTILIB_OPTIONS = mmul-type=none/mmul-type=mac/mmul-type=mul mno-byte-access/mbyte-access

# Using a mul unit (currently) implies that byte access is available.
MULTILIB_EXCEPTIONS = mmul-type=mul/mno-byte-access

# We want fine grained libraries, so use the new code
# to build the floating point emulation libraries.
FPBIT = fp-bit.c

# Software floating point support. Floating point is not properly
# supported, but is existence can be useful for some types of testing.
fp-bit.c:	$(srcdir)/config/fp-bit.c
	echo '#define FLOAT' > fp-bit.c
	echo '#define FLOAT_ONLY' >> fp-bit.c
	echo '#define SMALL_MACHINE' >> fp-bit.c
	cat $(srcdir)/config/fp-bit.c >> fp-bit.c