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Re: PATCH: PR target/35189: -mno-sse4.2 turns off SSE4a


On Wed, Feb 13, 2008 at 10:56 PM, Uros Bizjak <ubizjak@gmail.com> wrote:
> Hello!
>
>
>  > > SSE4A is independent of SSSE3 and SSE4. Turn off one shouldn't
>  > > turn off the other.  Also I think that SSE5 implies SSE4A.  Does this
>  > > patch make senses. If yes,. I can add a few testcases.
>  > >
>  >
>  > Here is the patch with testcases. OK for 4.3?
>
>  This patch can be committed to 4.3 as obvious, after Michael confirms
>  that it is OK for AMD targets.
>

I updated isa-3.c to test "-msse4 -msse5 -mno-sse4a". Michael, is this OK with
you?

Thanks.

H.J.
gcc/

2008-02-05  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/35189
	* config/i386/i386.c (OPTION_MASK_ISA_SSE3_UNSET): Add
	OPTION_MASK_ISA_SSE4A.
	(OPTION_MASK_ISA_SSE4_2_UNSET): Set to 0.
	(OPTION_MASK_ISA_SSE4A_UNSET): Set to OPTION_MASK_ISA_SSE5.

gcc/testsuite/

2008-02-05  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/35189
	* gcc.target/i386/isa-1.c: New.
	* gcc.target/i386/isa-2.c: Likewise.
	* gcc.target/i386/isa-3.c: Likewise.
	* gcc.target/i386/isa-4.c: Likewise.
	* gcc.target/i386/isa-5.c: Likewise.
	* gcc.target/i386/isa-6.c: Likewise.
	* gcc.target/i386/isa-7.c: Likewise.
	* gcc.target/i386/isa-8.c: Likewise.
	* gcc.target/i386/isa-9.c: Likewise.
	* gcc.target/i386/isa-10.c: Likewise.
	
--- gcc/config/i386/i386.c.sse4a	2008-02-13 09:31:47.000000000 -0800
+++ gcc/config/i386/i386.c	2008-02-13 17:34:37.000000000 -0800
@@ -1780,12 +1780,14 @@ static int ix86_isa_flags_explicit;
 #define OPTION_MASK_ISA_SSE2_UNSET \
   (OPTION_MASK_ISA_SSE3 | OPTION_MASK_ISA_SSE3_UNSET)
 #define OPTION_MASK_ISA_SSE3_UNSET \
-  (OPTION_MASK_ISA_SSSE3 | OPTION_MASK_ISA_SSSE3_UNSET)
+  (OPTION_MASK_ISA_SSSE3 \
+   | OPTION_MASK_ISA_SSE4A \
+   | OPTION_MASK_ISA_SSSE3_UNSET)
 #define OPTION_MASK_ISA_SSSE3_UNSET \
   (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_SSE4_1_UNSET)
 #define OPTION_MASK_ISA_SSE4_1_UNSET \
   (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_SSE4_2_UNSET)
-#define OPTION_MASK_ISA_SSE4_2_UNSET OPTION_MASK_ISA_SSE4A
+#define OPTION_MASK_ISA_SSE4_2_UNSET 0
 
 /* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same
    as -msse4.1 -msse4.2.  -mno-sse4 should the same as -mno-sse4.1. */
@@ -1793,7 +1795,7 @@ static int ix86_isa_flags_explicit;
   (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_SSE4_2)
 #define OPTION_MASK_ISA_SSE4_UNSET OPTION_MASK_ISA_SSE4_1_UNSET
 
-#define OPTION_MASK_ISA_SSE4A_UNSET OPTION_MASK_ISA_SSE4
+#define OPTION_MASK_ISA_SSE4A_UNSET OPTION_MASK_ISA_SSE5
 
 #define OPTION_MASK_ISA_SSE5_UNSET \
   (OPTION_MASK_ISA_3DNOW | OPTION_MASK_ISA_3DNOW_UNSET)
--- gcc/testsuite/gcc.target/i386/isa-1.c.sse4a	2008-02-14 08:54:56.000000000 -0800
+++ gcc/testsuite/gcc.target/i386/isa-1.c	2008-02-14 08:54:56.000000000 -0800
@@ -0,0 +1,34 @@
+/* { dg-do run } */
+/* { dg-options "-msse4" } */
+
+extern void abort (void);
+
+int
+main ()
+{
+#if !defined __SSE__
+  abort ();
+#endif
+#if !defined __SSE2__
+  abort ();
+#endif
+#if !defined __SSE3__
+  abort ();
+#endif
+#if !defined __SSSE3__
+  abort ();
+#endif
+#if !defined __SSE4_1__
+  abort ();
+#endif
+#if !defined __SSE4_2__
+  abort ();
+#endif
+#if defined __SSE4A__
+  abort ();
+#endif
+#if defined __SSE5__
+  abort ();
+#endif
+  return 0;
+}
--- gcc/testsuite/gcc.target/i386/isa-10.c.sse4a	2008-02-14 08:54:56.000000000 -0800
+++ gcc/testsuite/gcc.target/i386/isa-10.c	2008-02-14 08:54:56.000000000 -0800
@@ -0,0 +1,34 @@
+/* { dg-do run } */
+/* { dg-options "-msse5 -mno-sse4" } */
+
+extern void abort (void);
+
+int
+main ()
+{
+#if !defined __SSE__
+  abort ();
+#endif
+#if !defined __SSE2__
+  abort ();
+#endif
+#if !defined __SSE3__
+  abort ();
+#endif
+#if defined __SSSE3__
+  abort ();
+#endif
+#if defined __SSE4_1__
+  abort ();
+#endif
+#if defined __SSE4_2__
+  abort ();
+#endif
+#if !defined __SSE4A__
+  abort ();
+#endif
+#if !defined __SSE5__
+  abort ();
+#endif
+  return 0;
+}
--- gcc/testsuite/gcc.target/i386/isa-2.c.sse4a	2008-02-14 08:54:56.000000000 -0800
+++ gcc/testsuite/gcc.target/i386/isa-2.c	2008-02-14 08:54:56.000000000 -0800
@@ -0,0 +1,34 @@
+/* { dg-do run } */
+/* { dg-options "-msse4 -msse5" } */
+
+extern void abort (void);
+
+int
+main ()
+{
+#if !defined __SSE__
+  abort ();
+#endif
+#if !defined __SSE2__
+  abort ();
+#endif
+#if !defined __SSE3__
+  abort ();
+#endif
+#if !defined __SSSE3__
+  abort ();
+#endif
+#if !defined __SSE4_1__
+  abort ();
+#endif
+#if !defined __SSE4_2__
+  abort ();
+#endif
+#if !defined __SSE4A__
+  abort ();
+#endif
+#if !defined __SSE5__
+  abort ();
+#endif
+  return 0;
+}
--- gcc/testsuite/gcc.target/i386/isa-3.c.sse4a	2008-02-14 08:54:56.000000000 -0800
+++ gcc/testsuite/gcc.target/i386/isa-3.c	2008-02-14 08:56:24.000000000 -0800
@@ -0,0 +1,34 @@
+/* { dg-do run } */
+/* { dg-options "-msse4 -msse5 -mno-sse4a" } */
+
+extern void abort (void);
+
+int
+main ()
+{
+#if !defined __SSE__
+  abort ();
+#endif
+#if !defined __SSE2__
+  abort ();
+#endif
+#if !defined __SSE3__
+  abort ();
+#endif
+#if !defined __SSSE3__
+  abort ();
+#endif
+#if !defined __SSE4_1__
+  abort ();
+#endif
+#if !defined __SSE4_2__
+  abort ();
+#endif
+#if defined __SSE4A__
+  abort ();
+#endif
+#if defined __SSE5__
+  abort ();
+#endif
+  return 0;
+}
--- gcc/testsuite/gcc.target/i386/isa-4.c.sse4a	2008-02-14 08:54:56.000000000 -0800
+++ gcc/testsuite/gcc.target/i386/isa-4.c	2008-02-14 08:54:56.000000000 -0800
@@ -0,0 +1,34 @@
+/* { dg-do run } */
+/* { dg-options "-march=core2 -msse5 -mno-sse4" } */
+
+extern void abort (void);
+
+int
+main ()
+{
+#if !defined __SSE__
+  abort ();
+#endif
+#if !defined __SSE2__
+  abort ();
+#endif
+#if !defined __SSE3__
+  abort ();
+#endif
+#if !defined __SSSE3__
+  abort ();
+#endif
+#if defined __SSE4_1__
+  abort ();
+#endif
+#if defined __SSE4_2__
+  abort ();
+#endif
+#if !defined __SSE4A__
+  abort ();
+#endif
+#if !defined __SSE5__
+  abort ();
+#endif
+  return 0;
+}
--- gcc/testsuite/gcc.target/i386/isa-5.c.sse4a	2008-02-14 08:54:56.000000000 -0800
+++ gcc/testsuite/gcc.target/i386/isa-5.c	2008-02-14 08:54:56.000000000 -0800
@@ -0,0 +1,34 @@
+/* { dg-do run } */
+/* { dg-options "-march=core2 -msse4a -mno-sse4" } */
+
+extern void abort (void);
+
+int
+main ()
+{
+#if !defined __SSE__
+  abort ();
+#endif
+#if !defined __SSE2__
+  abort ();
+#endif
+#if !defined __SSE3__
+  abort ();
+#endif
+#if !defined __SSSE3__
+  abort ();
+#endif
+#if defined __SSE4_1__
+  abort ();
+#endif
+#if defined __SSE4_2__
+  abort ();
+#endif
+#if !defined __SSE4A__
+  abort ();
+#endif
+#if defined __SSE5__
+  abort ();
+#endif
+  return 0;
+}
--- gcc/testsuite/gcc.target/i386/isa-6.c.sse4a	2008-02-14 08:54:56.000000000 -0800
+++ gcc/testsuite/gcc.target/i386/isa-6.c	2008-02-14 08:54:56.000000000 -0800
@@ -0,0 +1,34 @@
+/* { dg-do run } */
+/* { dg-options "-march=amdfam10 -mno-sse4" } */
+
+extern void abort (void);
+
+int
+main ()
+{
+#if !defined __SSE__
+  abort ();
+#endif
+#if !defined __SSE2__
+  abort ();
+#endif
+#if !defined __SSE3__
+  abort ();
+#endif
+#if defined __SSSE3__
+  abort ();
+#endif
+#if defined __SSE4_1__
+  abort ();
+#endif
+#if defined __SSE4_2__
+  abort ();
+#endif
+#if !defined __SSE4A__
+  abort ();
+#endif
+#if defined __SSE5__
+  abort ();
+#endif
+  return 0;
+}
--- gcc/testsuite/gcc.target/i386/isa-7.c.sse4a	2008-02-14 08:54:56.000000000 -0800
+++ gcc/testsuite/gcc.target/i386/isa-7.c	2008-02-14 08:54:56.000000000 -0800
@@ -0,0 +1,34 @@
+/* { dg-do run } */
+/* { dg-options "-march=amdfam10 -msse5 -mno-sse4" } */
+
+extern void abort (void);
+
+int
+main ()
+{
+#if !defined __SSE__
+  abort ();
+#endif
+#if !defined __SSE2__
+  abort ();
+#endif
+#if !defined __SSE3__
+  abort ();
+#endif
+#if defined __SSSE3__
+  abort ();
+#endif
+#if defined __SSE4_1__
+  abort ();
+#endif
+#if defined __SSE4_2__
+  abort ();
+#endif
+#if !defined __SSE4A__
+  abort ();
+#endif
+#if !defined __SSE5__
+  abort ();
+#endif
+  return 0;
+}
--- gcc/testsuite/gcc.target/i386/isa-8.c.sse4a	2008-02-14 08:54:56.000000000 -0800
+++ gcc/testsuite/gcc.target/i386/isa-8.c	2008-02-14 08:54:56.000000000 -0800
@@ -0,0 +1,34 @@
+/* { dg-do run } */
+/* { dg-options "-march=amdfam10 -msse5 -mno-sse4a" } */
+
+extern void abort (void);
+
+int
+main ()
+{
+#if !defined __SSE__
+  abort ();
+#endif
+#if !defined __SSE2__
+  abort ();
+#endif
+#if !defined __SSE3__
+  abort ();
+#endif
+#if defined __SSSE3__
+  abort ();
+#endif
+#if defined __SSE4_1__
+  abort ();
+#endif
+#if defined __SSE4_2__
+  abort ();
+#endif
+#if defined __SSE4A__
+  abort ();
+#endif
+#if defined __SSE5__
+  abort ();
+#endif
+  return 0;
+}
--- gcc/testsuite/gcc.target/i386/isa-9.c.sse4a	2008-02-14 08:54:56.000000000 -0800
+++ gcc/testsuite/gcc.target/i386/isa-9.c	2008-02-14 08:54:56.000000000 -0800
@@ -0,0 +1,34 @@
+/* { dg-do run } */
+/* { dg-options "-march=amdfam10 -mno-sse5" } */
+
+extern void abort (void);
+
+int
+main ()
+{
+#if !defined __SSE__
+  abort ();
+#endif
+#if !defined __SSE2__
+  abort ();
+#endif
+#if !defined __SSE3__
+  abort ();
+#endif
+#if defined __SSSE3__
+  abort ();
+#endif
+#if defined __SSE4_1__
+  abort ();
+#endif
+#if defined __SSE4_2__
+  abort ();
+#endif
+#if !defined __SSE4A__
+  abort ();
+#endif
+#if defined __SSE5__
+  abort ();
+#endif
+  return 0;
+}

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