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Re: [PATCH] Improve handling of COND_EXECs in haifa_classify_insn.


Maxim Kuvyrkov wrote:

Alexander Monakov wrote:
Hi.
This patch has been in sel-sched branch for a while. It makes haifa_classify_insn look into predicate and code parts of COND_EXEC to decide whether it traps or not, instead of assuming that all COND_EXECs trap. It also factors code duplication in handling of PARALLELs (by using recursion).
Bootstrapped and regtested on x64_64 with --disable-multilib and on ia64.

Hi!


I don't have the authority to approve the patch, so below are merely my suggestions to improve it.
[snip]

Changed according to Maxim's suggestions, bootstrapped and regtested on ia64. This patch produces minor performance and code-size improvements on ia64 by allowing scheduler to move some of the predicated instructions across basic-block boundaries.

    * gcc/haifa-sched.c (haifa_classify_insn): Rename to ...
    (haifa_classify_expr): ... this.  Improve handling of
    COND_EXECs, handle PARALLELs by recursing.  Use it ...
    (haifa_classify_insn): ... here.  Reimplement.

--- gcc/haifa-sched.c	(revision 32194)
+++ gcc/haifa-sched.c	(local)
@@ -405,8 +405,8 @@ may_trap_exp (const_rtx x, int is_store)
     }
 }

-/* Classifies insn for the purpose of verifying that it can be
- moved speculatively, by examining it's patterns, returning:
+/* Classifies pattern of an insn for the purpose of verifying that it can be
+ moved speculatively, by examining it, returning:
TRAP_RISKY: store, or risky non-load insn (e.g. division by variable).
TRAP_FREE: non-load insn.
IFREE: load from a globally safe location.
@@ -414,10 +414,9 @@ may_trap_exp (const_rtx x, int is_store)
PFREE_CANDIDATE, PRISKY_CANDIDATE: load that need to be checked for
being either PFREE or PRISKY. */


-int
-haifa_classify_insn (const_rtx insn)
+static int
+haifa_classify_expr (const_rtx pat)
 {
-  rtx pat = PATTERN (insn);
   int tmp_class = TRAP_FREE;
   int insn_class = TRAP_FREE;
   enum rtx_code code;
@@ -428,31 +427,7 @@ haifa_classify_insn (const_rtx insn)

       for (i = len - 1; i >= 0; i--)
 	{
-	  code = GET_CODE (XVECEXP (pat, 0, i));
-	  switch (code)
-	    {
-	    case CLOBBER:
-	      /* Test if it is a 'store'.  */
-	      tmp_class = may_trap_exp (XEXP (XVECEXP (pat, 0, i), 0), 1);
-	      break;
-	    case SET:
-	      /* Test if it is a store.  */
-	      tmp_class = may_trap_exp (SET_DEST (XVECEXP (pat, 0, i)), 1);
-	      if (tmp_class == TRAP_RISKY)
-		break;
-	      /* Test if it is a load.  */
-	      tmp_class
-		= WORST_CLASS (tmp_class,
-			       may_trap_exp (SET_SRC (XVECEXP (pat, 0, i)),
-					     0));
-	      break;
-	    case COND_EXEC:
-	    case TRAP_IF:
-	      tmp_class = TRAP_RISKY;
-	      break;
-	    default:
-	      ;
-	    }
+	  tmp_class = haifa_classify_expr (XVECEXP (pat, 0, i));
 	  insn_class = WORST_CLASS (insn_class, tmp_class);
 	  if (insn_class == TRAP_RISKY || insn_class == IRISKY)
 	    break;
@@ -478,6 +453,12 @@ haifa_classify_insn (const_rtx insn)
 			 may_trap_exp (SET_SRC (pat), 0));
 	  break;
 	case COND_EXEC:
+	  tmp_class = haifa_classify_expr (COND_EXEC_CODE (pat));
+	  if (tmp_class == TRAP_RISKY)
+	    break;
+	  tmp_class = WORST_CLASS (tmp_class,
+				   may_trap_exp (COND_EXEC_TEST (pat), 0));
+	  break;
 	case TRAP_IF:
 	  tmp_class = TRAP_RISKY;
 	  break;
@@ -489,6 +470,13 @@ haifa_classify_insn (const_rtx insn)
   return insn_class;
 }

+int
+haifa_classify_insn (const_rtx insn)
+{
+  return haifa_classify_expr (PATTERN (insn));
+}
+
+
 /* A typedef for rtx vector.  */
 typedef VEC(rtx, heap) *rtx_vec_t;



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