RFC: gcc-4.3/changes.html for MIPS

[Richard Sandiford <rsandifo at nildram dot co dot uk>]

As promised a while ago, I've gone through the 4.3 MIPS changes and
tried to write them up in changes.html.  Does the patch below look OK?

Richard


Index: htdocs/gcc-4.3/changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.3/changes.html,v
retrieving revision 1.74
diff -u -p -r1.74 changes.html
--- htdocs/gcc-4.3/changes.html	20 Sep 2007 12:14:29 -0000	1.74
+++ htdocs/gcc-4.3/changes.html	30 Sep 2007 21:45:03 -0000
@@ -497,11 +497,156 @@
     </ul>
 
 <h3>MIPS</h3>
-  <ul>
-    <li>Support for 74K family processors has been added, with
-	associated <code>-march</code> and <code>-mtune</code>
-	options.</li>
-  </ul>
+  <h4>Changes to existing configurations</h4>
+    <ul>
+      <li><code>libffi</code> and <code>libjava</code> now support all
+	  three GNU/Linux ABIs: o32, n32 and n64.  Every GNU/Linux
+	  configuration now builds these libraries by default.</li>
+      <li>GNU/Linux configurations now generate <code>-mno-shared</code>
+	  code unless overridden by <code>-fpic</code>,
+	  <code>-fPIC</code>, <code>-fpie</code> or
+	  <code>-fPIE</code>.</li>
+      <li><code>mipsisa32*-linux-gnu</code> configurations now generate
+	  hard-float code by default, just like other <code>mipsisa32*</code>
+	  and <code>mips*-linux-gnu</code> configurations.  You can
+	  build a soft-float version of any <code>mips*-linux-gnu</code>
+	  configuration by passing <code>--with-float=soft</code> to
+	  <code>configure</code>.</li>
+      <li><code>mips-wrs-vxworks</code> now supports run-time processes
+	  (RTPs).</code>
+    </ul>
+  <h4>Changes to existing command-line options</h4>
+    <ul>
+      <li>The <code>-march</code> and <code>-mtune</code> options no
+	  longer accept <code>24k</code> as a processor name.  Please
+	  use <code>24kc</code>, <code>24kf2_1</code> or
+	  <code>24kf1_1</code> instead.</li>
+      <li>The <code>-march</code> and <code>-mtune</code> options now
+	  accept <code>24kf2_1</code>, <code>24kef2_1</code> and
+	  <code>34kf2_1</code> as synonyms for <code>24kf</code>,
+	  <code>24kef</code> and <code>34kf</code> respectively.
+	  The options also accept <code>24kf1_1</code>,
+	  <code>24kef1_1</code> and <code>34kf1_1</code> as synonyms for
+	  <code>24kx</code>, <code>24kex</code> and <code>34kx</code>.</li>
+    </ul>
+  <h4>New configurations</h4>
+    <p>GCC now supports the following configurations:</p>
+    <ul>
+      <li><code>mipsisa32r2*-linux-gnu*</code>, which generates MIPS32
+	  revision 2 code by default.  Earlier releases also recognized
+	  this configuration, but they treated it in the same way as
+	  <code>mipsisa32*-linux-gnu*</code>.  Note that you can
+	  customize any <code>mips*-linux-gnu*</code> configuration
+	  to a particular ISA or processor by passing an appropriate
+	  <code>--with-arch</code> option to <code>configure</code>.</li>
+      <li><code>mipsisa*-sde-elf*</code>, which provides compatibility
+	  with MIPS Technologies' SDE toolchains.  The configuration
+	  uses the SDE libraries by default, but you can use it like
+	  other newlib-based ELF configurations by passing
+	  <code>--with-newlib</code> to <code>configure</code>.  It is
+	  the only configuration besides <code>mips64vr*-elf*</code> to
+	  build MIPS16 as well as non-MIPS16 libraries.</li>
+      <li><code>mipsisa*-elfoabi*</code>, which is similar to the general
+	  <code>mipsisa*-elf*</code> configuration, but uses the o32 and
+	  o64 ABIs instead of the 32-bit and 64-bit forms of the EABI.</li>
+    </ul>
+  <h4>New processors and application-specific extensions</h4>
+    <ul>
+      <li>Support for the SmartMIPS ASE is available through the
+	  new <code>-msmartmips</code> option.</li>
+      <li>Support for revision 2 of the DSP ASE is available through
+	  the new <code>-mdspr2</code> option.  A new preprocessor macro
+	  called <code>__mips_dsp_rev</code> indicates the revision of
+	  the ASE in use.</li>
+      <li>Support for the 4KS and 74K families of processors is
+	  available through the <code>-march</code> and <code>-mtune</code>
+	  options.</li>
+    </ul>
+  <h4>Improved support for built-in functions</h4>
+    <ul>
+      <li>GCC can now use load-linked, store-conditional and
+	  <code>sync</code> instructions to implement atomic built-in
+	  functions such as <code>__sync_fetch_and_add</code>.  The
+	  memory reference must be 4 bytes wide for 32-bit targets and
+	  either 4 or 8 bytes wide for 64-bit targets.</li>
+      <li>GCC can now use the <code>clz</code> and <code>dclz</code>
+	  instructions to implement the <code>__builtin_ctz</code> and
+	  <code>__builtin_ffs</code> families of functions.</li>
+      <li>There is a new <code>__builtin___clear_cache</code> function
+	  for flushing the instruction cache.  GCC expands this function
+	  inline on MIPS32 revision 2 targets, otherwise it calls the
+	  function specified by <code>-mcache-flush-func</code>.</li>
+    </ul>
+  <h4>MIPS16 improvements</h4>
+    <ul>
+      <li>GCC can now compile objects that contain a mixture of MIPS16
+	  and non-MIPS16 code.  There are two new attributes,
+	  <code>mips16</code> and <code>nomips16</code>, for specifying
+	  which mode a function should use.</li>
+      <li>A new option called <code>-minterlink-mips16</code>
+	  makes non-MIPS16 code link-compatible with MIPS16 code.</li>
+      <li>After many bug fixes, the long-standing MIPS16
+	  <code>-mhard-float</code> support should now work fairly
+	  reliably.</li>
+      <li>GCC can now use the MIPS16e <code>save</code> and
+	  <code>restore</code> instructions.</li>
+      <li><code>-fsection-anchors</code> now works in MIPS16 mode.
+	  MIPS16 code compiled with <code>-G0</code>
+	  <code>-fsection-anchors</code> is often smaller than code
+	  compiled with <code>-G8</code>.  However, please note that you
+	  must usually compile all objects in your application with the
+	  same <code>-G</code> option; see the documentation of
+	  <code>-G</code> for details.</li>
+      <li>A new option called<code>-mcode-readable</code> specifies
+	  which instructions are allowed to load from the code segment.
+	  <code>-mcode-readable=yes</code> is the default and says that
+	  any instruction may load from the code segment.  The other
+	  alternatives are <code>-mcode-readable=pcrel</code>, which
+	  says that only PC-relative MIPS16 instructions may load from
+	  the code segment, and <code>-mcode-readable=no</code>, which
+	  says that no instruction may do so.  Please see the
+	  documentation for more details, including example uses.</li>
+    </ul>
+  <h4>Small-data improvements</h4>
+    <p>There are three new options for controlling small data:</p>
+    <ul>
+      <li><code>-mno-extern-sdata</code>, which disables small-data
+	  accesses for externally-defined variables.  Code compiled
+	  with <code>-Gn</code> <code>-mno-extern-sdata</code> will be
+	  link-compatible with any <code>-G</code> setting between
+	  <code>-G0</code> and <code>-Gn</code> inclusive.</li>
+      <li><code>-mno-local-sdata</code>, which disables the use of
+	  small-data sections for data that is not externally visible.
+	  This option can be a useful way of reducing small-data usage
+	  in less performance-critical parts of an application.</li>
+      <li><code>-mno-gpopt</code>, which disables the use of the
+	  <code>$gp</code> register while still honoring the
+	  <code>-G</code> limit when placing externally-visible data.
+	  This option implies <code>-mno-extern-sdata</code> and
+	  <code>-mno-local-sdata</code> and it can be useful in
+	  situations where <code>$gp</code> does not necessarily hold
+	  the expected value.</li>
+    </ul>
+  <h4>Miscellaneous improvements</h4>
+    <ul>
+      <li>There is a new option called <code>-mbranch-cost</code>
+	  for tweaking the perceived cost of branches.</li>
+      <li>If GCC is configured to use a version of GAS that supports
+	  the <code>.gnu_attribute</code> directive, it will use that
+	  directive to record certain properties of the output code.
+	  <code>.gnu_attribute</code> is new to GAS 2.18.</li>
+      <li>There are two new function attributes, <code>near</code>
+	  and <code>far</code>, for overriding the command-line setting
+	  of <code>-mlong-calls</code> on a function-by-function
+	  basis.</li>
+      <li><code>-mfp64</code>, which previously required a 64-bit target,
+	  now works with MIPS32 revision 2 targets as well.  The
+	  <code>mipsisa*-elfoabi*</code> and <code>mipsisa*-sde-elf*</code>
+	  configurations provide suitable library support.</li>
+      <li>GCC now recognizes the <code>-mdmx</code> and <code>-mmt</code>
+	  options and passes them down to the assembler.  It does nothing
+	  else with the options at present.</li>
+    </ul>
 
 <h3>SPU (Synergistic Processor Unit) of the Cell Broadband Engine
     Architecture (BEA)</h3>