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Re: SSE conversion optimization
- From: "H.J. Lu" <hjl at lucon dot org>
- To: Jan Hubicka <jh at suse dot cz>
- Cc: gcc-patches at gcc dot gnu dot org, dwarak dot rajagopal at amd dot com, hongjiu dot lu at intel dot com
- Date: Sat, 8 Sep 2007 16:10:28 -0700
- Subject: Re: SSE conversion optimization
- References: <20070908220228.GH10905@kam.mff.cuni.cz>
On Sun, Sep 09, 2007 at 12:02:28AM +0200, Jan Hubicka wrote:
> ! For flat_trapping_math we can't safely use vector conversion without
> ! clearing upper half, otherwise precision exception might occur.
> ! However we can still generate the common sequence converting value
> ! from general register to XMM register as:
> !
> ! mov reg32, mem32
> ! movd mem32, xmm
> ! cvtdq2pd xmm,xmm
> !
> ! because we know that movd clears the upper half.
> !
I am afraid this hurts Core 2 Duo since it changes
cvtsi2sd reg32, xmm
to
mov reg32, mem32
movd mem32, xmm
cvtdq2pd xmm,xmm
This is very bad for Core 2 Duo. I saw 10% slow down on one
SPEC CPU 2006 FP benckmark on Core 2 Duo. I am rerunning
SPEC CPU 2006 with this one disabled on Core 2 Duo.
H.J.