Patch #1 to add SSE5 support to the x86 GCC compiler

["Michael Meissner" <michael dot meissner at amd dot com>]

On August 30th, AMD announced the new SSE5 instruction set that will be
part of future processors.  The programmer's guide for these new
instructions is located at:
http://developer.amd.com/assets/sse5_43479_BDAPMU_3-00_8-27-07.pdf

The enclosed patch adds support for the SSE5 instructions to the GCC compiler
(patches for binutils have already been posted in the binutils mailing list).
This is the first patch, and there will be more patches in the coming days.  I
sent a preview of the patches to Jan Hubicka, and I have made several changes
that he asked for, but I'm sure there are other places that can be improved
upon.  I have tested this compiler by doing a full bootstrap build on x86_64
and I got the same regressions in the testsuite before/after my changes.  I'll
kick off a i386 build shortly.

This partciular patch does the following:
  1) adds the basic SSE5 support
  2) On SSE5, optimizes floating point multiply/add instructions
  3) On SSE5, uses xmm conditional move instructions

Future patches will:
  1) Add vector integer multiply/add support
  2) Add SSE5 pack/unpack support via PPERM
  3) Add intrinsic support for all of the instructions
  4) Add SSE5 optimization and unit tests to the testsuite

-- 
Michael Meissner, AMD
90 Central Street, MS 83-29, Boxborough, MA, 01719, USA
michael.meissner@amd.com

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