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[RFA:] Rename define_mode_macro to define_mode_iterator, ditto define_code_*


Richard Sandiford, the author of this machinery, kindly asked
that I do the legwork to rename these things.  Ok, not exactly,
but he suggested in off-list email that I go ahead and rename it
since I've complained about the name "many times" (though I
can't find more than about five occasions - I've even forgot
whether I've said it on the list before!)  He "has no objection
at all".  This seems like a good time to do it, if ever.
I guess the reason I didn't bring this up originally at the RFC
<http://gcc.gnu.org/ml/gcc/2004-08/msg00255.html> was that I was
behind on reading the lists and didn't look into it far enough
to get it until I used it.  Sorry about that and thank you
Richard for this very nice feature, a rose by any name.  I don't
remember saying thanks before either. :)

Why rename it?  Well, mostly the irk factor; it just seems the
wrong name for what it does.  Macros usually (as in I've not
seen otherwise elsewhere) look like that; they don't have a
fixed domain of more than one enumerated elements specified at
the macro definition time.  Their invocation machinery usually
means you pass a parameter, not a body around which these
elements are each expanded, generating several instances of the
"argument", the insn body.  That rather suggests this predefined
set of elements is something I associate with the name iterator.
Besides, if or when a "normal" macro facility for RTL is
eventually added, it'll probably also be called something with
"macro" in the name and then it'd look odd to have e.g. a
define_macro that worked "normally" while define_code_macro and
define_mode_macro are expanded "inside-out".  (Is this what they
call a strawman argument?  Does it work? :)

There may be an alternate approach in which only the documentation
is changed and where read-rtl.c changed to accept
define_mode_iterator and define_code_iterator as synonyms to the
macro names but I didn't think of that until I'd done the work,
and it'd seem a bit inconsistent anyway.

The actual ports change was indeed very mechanical, though I
separately inspected code to change "macro" into "iterator" in
comments, fixing grammar and such and to adjust indentation.  I
cross-tested cris-axis-elf and mmix-knuth-mmixware (though the
latter has no iterators) with no regressions, and built and
inspected the generated files (obj/gcc/*.{[hc],md}) from "make
all-gcc" for all targets with iterators, alpha-unknown-linux-gnu
arm-elf bfin-elf crx-elf frv-elf ia64-elf m32c-elf m68k-elf
mips-elf powerpc-eabisim s390-unknown-linux-gnu-elf spu-elf
vax-unknown-netbsdelf xtensa-elf sparc-elf and similar for the
partial build (bootstrap broken at the time) of native x86_64 to
check that those files were identical.

Doc changes verified with "make info-gcc dvi-gcc".  DVI output
inspected and compared; quality has not regressed.

Random observations:
Grepping on "macro" in config/*/*.h still yields lots of
copy-paste from tm.texi for some ports.  Page 300 of gccint.dvi
consists of just the two lines "})" and "...") both before and
after this patch.  The MMIX port suffers from rot that I've
traced back to the df merge; the _write syscall is miscompiled;
the register parameter for the length is overwritten.

:ADDPATCH middle-end:

Ok to commit?
gcc/

	* doc/md.texi (Iterators): Renamed from Macros.  All contents
	changed to reflect rename of respectively define_code_macro and
	define_mode_macro to define_code_iterator and define_mode_iterator.
	(Mode Iterators, Code Iterators): Similar.
	* read-rtl.c (struct iterator_group, struct iterator_traverse_data)
	(uses_mode_iterator_p, apply_mode_iterator, uses_code_iterator_p)
	(apply_iterator_to_string, uses_iterator_p, apply_iterator_traverse)
	(initialize_iterators, find_iterator, check_code_iterator)
	(map_attr_string, apply_mode_maps, apply_iterator_to_rtx, add_mapping)
	(read_mapping, read_rtx_1): Similar.
	* config/alpha/sync.md, config/alpha/alpha.md, config/frv/frv.md,
	config/s390/s390.md, config/m32c/blkmov.md, config/m32c/m32c.md,
	config/spu/spu.md, config/sparc/sparc.md, config/sparc/sync.md,
	config/i386/i386.md, config/i386/mmx.md, config/i386/sse.md,
	config/i386/sync.md, config/crx/crx.md, config/xtensa/xtensa.md,
	config/cris/cris.c, config/cris/cris.md, config/ia64/sync.md,
	config/ia64/div.md, config/ia64/vect.md, config/ia64/ia64.md,
	config/m68k/m68k.md, config/rs6000/spe.md, config/rs6000/altivec.md,
	config/rs6000/sync.md, config/rs6000/rs6000.md,
	config/arm/vec-common.md, config/arm/neon.md, config/arm/iwmmxt.md,
	config/arm/arm.md, config/mips/mips-dsp.md, config/mips/mips.md,
	config/vax/vax.md, config/bfin/bfin.md: Similar.


Index: gcc/doc/md.texi
===================================================================
--- gcc/doc/md.texi	(revision 127652)
+++ gcc/doc/md.texi	(working copy)
@@ -47,7 +47,7 @@
                            predication.
 * Constant Definitions::Defining symbolic constants that can be used in the
                         md file.
-* Macros::              Using macros to generate patterns from a template.
+* Iterators::           Using iterators to generate patterns from a template.
 @end menu
 
 @node Overview
@@ -7649,22 +7649,22 @@
 in the insn-codes.h header file as #defines.
 @end ifset
 @ifset INTERNALS
-@node Macros
-@section Macros
-@cindex macros in @file{.md} files
+@node Iterators
+@section Iterators
+@cindex iterators in @file{.md} files
 
 Ports often need to define similar patterns for more than one machine
-mode or for more than one rtx code.  GCC provides some simple macro
+mode or for more than one rtx code.  GCC provides some simple iterator
 facilities to make this process easier.
 
 @menu
-* Mode Macros::         Generating variations of patterns for different modes.
-* Code Macros::         Doing the same for codes.
+* Mode Iterators::         Generating variations of patterns for different modes.
+* Code Iterators::         Doing the same for codes.
 @end menu
 
-@node Mode Macros
-@subsection Mode Macros
-@cindex mode macros in @file{.md} files
+@node Mode Iterators
+@subsection Mode Iterators
+@cindex mode iterators in @file{.md} files
 
 Ports often need to define similar patterns for two or more different modes.
 For example:
@@ -7681,25 +7681,25 @@
 @code{SImode} and @code{DImode} patterns for manipulating pointers.
 @end itemize
 
-Mode macros allow several patterns to be instantiated from one
+Mode iterators allow several patterns to be instantiated from one
 @file{.md} file template.  They can be used with any type of
 rtx-based construct, such as a @code{define_insn},
 @code{define_split}, or @code{define_peephole2}.
 
 @menu
-* Defining Mode Macros:: Defining a new mode macro.
-* Substitutions::	 Combining mode macros with substitutions
-* Examples::             Examples
+* Defining Mode Iterators:: Defining a new mode iterator.
+* Substitutions::	    Combining mode iterators with substitutions
+* Examples::		    Examples
 @end menu
 
-@node Defining Mode Macros
-@subsubsection Defining Mode Macros
-@findex define_mode_macro
+@node Defining Mode Iterators
+@subsubsection Defining Mode Iterators
+@findex define_mode_iterator
 
-The syntax for defining a mode macro is:
+The syntax for defining a mode iterator is:
 
 @smallexample
-(define_mode_macro @var{name} [(@var{mode1} "@var{cond1}") ... (@var{moden} "@var{condn}")])
+(define_mode_iterator @var{name} [(@var{mode1} "@var{cond1}") ... (@var{moden} "@var{condn}")])
 @end smallexample
 
 This allows subsequent @file{.md} file constructs to use the mode suffix
@@ -7712,7 +7712,7 @@
 For example:
 
 @smallexample
-(define_mode_macro P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
+(define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
 @end smallexample
 
 defines a new mode suffix @code{:P}.  Every construct that uses
@@ -7726,21 +7726,21 @@
 to @code{@var{mode}}.  For example:
 
 @smallexample
-(define_mode_macro GPR [SI (DI "TARGET_64BIT")])
+(define_mode_iterator GPR [SI (DI "TARGET_64BIT")])
 @end smallexample
 
 means that the @code{:DI} expansion only applies if @code{TARGET_64BIT}
 but that the @code{:SI} expansion has no such constraint.
 
-Macros are applied in the order they are defined.  This can be
-significant if two macros are used in a construct that requires
+Iterators are applied in the order they are defined.  This can be
+significant if two iterators are used in a construct that requires
 substitutions.  @xref{Substitutions}.
 
 @node Substitutions
-@subsubsection Substitution in Mode Macros
+@subsubsection Substitution in Mode Iterators
 @findex define_mode_attr
 
-If an @file{.md} file construct uses mode macros, each version of the
+If an @file{.md} file construct uses mode iterators, each version of the
 construct will often need slightly different strings or modes.  For
 example:
 
@@ -7756,7 +7756,7 @@
 
 @item
 When a @code{define_insn} requires operands with different modes,
-using a macro for one of the operand modes usually requires a specific
+using an iterator for one of the operand modes usually requires a specific
 mode for the other operand(s).
 @end itemize
 
@@ -7772,9 +7772,9 @@
 where @var{name} is the name of the attribute and @var{valuei}
 is the value associated with @var{modei}.
 
-When GCC replaces some @var{:macro} with @var{:mode}, it will scan
+When GCC replaces some @var{:iterator} with @var{:mode}, it will scan
 each string and mode in the pattern for sequences of the form
-@code{<@var{macro}:@var{attr}>}, where @var{attr} is the name of a
+@code{<@var{iterator}:@var{attr}>}, where @var{attr} is the name of a
 mode attribute.  If the attribute is defined for @var{mode}, the whole
 @code{<...>} sequence will be replaced by the appropriate attribute
 value.
@@ -7782,7 +7782,7 @@
 For example, suppose an @file{.md} file has:
 
 @smallexample
-(define_mode_macro P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
+(define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
 (define_mode_attr load [(SI "lw") (DI "ld")])
 @end smallexample
 
@@ -7794,23 +7794,23 @@
 Here is an example of using an attribute for a mode:
 
 @smallexample
-(define_mode_macro LONG [SI DI])
+(define_mode_iterator LONG [SI DI])
 (define_mode_attr SHORT [(SI "HI") (DI "SI")])
 (define_insn ...
   (sign_extend:LONG (match_operand:<LONG:SHORT> ...)) ...)
 @end smallexample
 
-The @code{@var{macro}:} prefix may be omitted, in which case the
-substitution will be attempted for every macro expansion.
+The @code{@var{iterator}:} prefix may be omitted, in which case the
+substitution will be attempted for every iterator expansion.
 
 @node Examples
-@subsubsection Mode Macro Examples
+@subsubsection Mode Iterator Examples
 
 Here is an example from the MIPS port.  It defines the following
 modes and attributes (among others):
 
 @smallexample
-(define_mode_macro GPR [SI (DI "TARGET_64BIT")])
+(define_mode_iterator GPR [SI (DI "TARGET_64BIT")])
 (define_mode_attr d [(SI "") (DI "d")])
 @end smallexample
 
@@ -7850,28 +7850,28 @@
    (set_attr "mode" "DI")])
 @end smallexample
 
-@node Code Macros
-@subsection Code Macros
-@cindex code macros in @file{.md} files
-@findex define_code_macro
+@node Code Iterators
+@subsection Code Iterators
+@cindex code iterators in @file{.md} files
+@findex define_code_iterator
 @findex define_code_attr
 
-Code macros operate in a similar way to mode macros.  @xref{Mode Macros}.
+Code iterators operate in a similar way to mode iterators.  @xref{Mode Iterators}.
 
 The construct:
 
 @smallexample
-(define_code_macro @var{name} [(@var{code1} "@var{cond1}") ... (@var{coden} "@var{condn}")])
+(define_code_iterator @var{name} [(@var{code1} "@var{cond1}") ... (@var{coden} "@var{condn}")])
 @end smallexample
 
 defines a pseudo rtx code @var{name} that can be instantiated as
 @var{codei} if condition @var{condi} is true.  Each @var{codei}
 must have the same rtx format.  @xref{RTL Classes}.
 
-As with mode macros, each pattern that uses @var{name} will be
+As with mode iterators, each pattern that uses @var{name} will be
 expanded @var{n} times, once with all uses of @var{name} replaced by
 @var{code1}, once with all uses replaced by @var{code2}, and so on.
-@xref{Defining Mode Macros}.
+@xref{Defining Mode Iterators}.
 
 It is possible to define attributes for codes as well as for modes.
 There are two standard code attributes: @code{code}, the name of the
@@ -7882,11 +7882,11 @@
 (define_code_attr @var{name} [(@var{code1} "@var{value1}") ... (@var{coden} "@var{valuen}")])
 @end smallexample
 
-Here's an example of code macros in action, taken from the MIPS port:
+Here's an example of code iterators in action, taken from the MIPS port:
 
 @smallexample
-(define_code_macro any_cond [unordered ordered unlt unge uneq ltgt unle ungt
-                             eq ne gt ge lt le gtu geu ltu leu])
+(define_code_iterator any_cond [unordered ordered unlt unge uneq ltgt unle ungt
+                                eq ne gt ge lt le gtu geu ltu leu])
 
 (define_expand "b<code>"
   [(set (pc)
Index: gcc/read-rtl.c
===================================================================
--- gcc/read-rtl.c	(revision 127652)
+++ gcc/read-rtl.c	(working copy)
@@ -21,7 +21,7 @@
 
 #include "bconfig.h"
 
-/* Disable rtl checking; it conflicts with the macro handling.  */
+/* Disable rtl checking; it conflicts with the iterator handling.  */
 #undef ENABLE_RTL_CHECKING
 
 #include "system.h"
@@ -41,17 +41,17 @@
   const char *string;
 };
 
-/* Maps a macro or attribute name to a list of (integer, string) pairs.
+/* Maps an iterator or attribute name to a list of (integer, string) pairs.
    The integers are mode or code values; the strings are either C conditions
    or attribute values.  */
 struct mapping {
-  /* The name of the macro or attribute.  */
+  /* The name of the iterator or attribute.  */
   const char *name;
 
-  /* The group (modes or codes) to which the macro or attribute belongs.  */
-  struct macro_group *group;
+  /* The group (modes or codes) to which the iterator or attribute belongs.  */
+  struct iterator_group *group;
 
-  /* Gives a unique number to the attribute or macro.  Numbers are
+  /* Gives a unique number to the attribute or iterator.  Numbers are
      allocated consecutively, starting at 0.  */
   int index;
 
@@ -59,13 +59,13 @@
   struct map_value *values;
 };
 
-/* A structure for abstracting the common parts of code and mode macros.  */
-struct macro_group {
-  /* Tables of "mapping" structures, one for attributes and one for macros.  */
-  htab_t attrs, macros;
+/* A structure for abstracting the common parts of code and mode iterators.  */
+struct iterator_group {
+  /* Tables of "mapping" structures, one for attributes and one for iterators.  */
+  htab_t attrs, iterators;
 
   /* The number of "real" modes or codes (and by extension, the first
-     number available for use as a macro placeholder).  */
+     number available for use as an iterator placeholder).  */
   int num_builtins;
 
   /* Treat the given string as the name of a standard mode or code and
@@ -73,10 +73,10 @@
   int (*find_builtin) (const char *, FILE *);
 
   /* Return true if the given rtx uses the given mode or code.  */
-  bool (*uses_macro_p) (rtx, int);
+  bool (*uses_iterator_p) (rtx, int);
 
   /* Make the given rtx use the given mode or code.  */
-  void (*apply_macro) (rtx, int);
+  void (*apply_iterator) (rtx, int);
 };
 
 /* Associates PTR (which can be a string, etc.) with the file location
@@ -87,9 +87,9 @@
   int lineno;
 };
 
-/* A structure used to pass data from read_rtx to apply_macro_traverse
+/* A structure used to pass data from read_rtx to apply_iterator_traverse
    via htab_traverse.  */
-struct macro_traverse_data {
+struct iterator_traverse_data {
   /* Instruction queue.  */
   rtx queue;
   /* Attributes seen for modes.  */
@@ -100,7 +100,7 @@
   const char *unknown_mode_attr;
 };
 
-/* If CODE is the number of a code macro, return a real rtx code that
+/* If CODE is the number of a code iterator, return a real rtx code that
    has the same format.  Return CODE otherwise.  */
 #define BELLWETHER_CODE(CODE) \
   ((CODE) < NUM_RTX_CODE ? CODE : bellwether_codes[CODE - NUM_RTX_CODE])
@@ -109,23 +109,23 @@
   ATTRIBUTE_PRINTF_2 ATTRIBUTE_NORETURN;
 static void fatal_expected_char (FILE *, int, int) ATTRIBUTE_NORETURN;
 static int find_mode (const char *, FILE *);
-static bool uses_mode_macro_p (rtx, int);
-static void apply_mode_macro (rtx, int);
+static bool uses_mode_iterator_p (rtx, int);
+static void apply_mode_iterator (rtx, int);
 static int find_code (const char *, FILE *);
-static bool uses_code_macro_p (rtx, int);
-static void apply_code_macro (rtx, int);
-static const char *apply_macro_to_string (const char *, struct mapping *, int);
-static rtx apply_macro_to_rtx (rtx, struct mapping *, int,
-			       struct map_value *, FILE *, const char **);
-static bool uses_macro_p (rtx, struct mapping *);
+static bool uses_code_iterator_p (rtx, int);
+static void apply_code_iterator (rtx, int);
+static const char *apply_iterator_to_string (const char *, struct mapping *, int);
+static rtx apply_iterator_to_rtx (rtx, struct mapping *, int,
+				  struct map_value *, FILE *, const char **);
+static bool uses_iterator_p (rtx, struct mapping *);
 static const char *add_condition_to_string (const char *, const char *);
 static void add_condition_to_rtx (rtx, const char *);
-static int apply_macro_traverse (void **, void *);
-static struct mapping *add_mapping (struct macro_group *, htab_t t,
+static int apply_iterator_traverse (void **, void *);
+static struct mapping *add_mapping (struct iterator_group *, htab_t t,
 				    const char *, FILE *);
 static struct map_value **add_map_value (struct map_value **,
 					 int, const char *);
-static void initialize_macros (void);
+static void initialize_iterators (void);
 static void read_name (char *, FILE *);
 static hashval_t leading_ptr_hash (const void *);
 static int leading_ptr_eq_p (const void *, const void *);
@@ -140,14 +140,14 @@
 static void read_constants (FILE *infile, char *tmp_char);
 static void read_conditions (FILE *infile, char *tmp_char);
 static void validate_const_int (FILE *, const char *);
-static int find_macro (struct macro_group *, const char *, FILE *);
-static struct mapping *read_mapping (struct macro_group *, htab_t, FILE *);
-static void check_code_macro (struct mapping *, FILE *);
+static int find_iterator (struct iterator_group *, const char *, FILE *);
+static struct mapping *read_mapping (struct iterator_group *, htab_t, FILE *);
+static void check_code_iterator (struct mapping *, FILE *);
 static rtx read_rtx_1 (FILE *, struct map_value **);
 static rtx read_rtx_variadic (FILE *, struct map_value **, rtx);
 
-/* The mode and code macro structures.  */
-static struct macro_group modes, codes;
+/* The mode and code iterator structures.  */
+static struct iterator_group modes, codes;
 
 /* Index I is the value of BELLWETHER_CODE (I + NUM_RTX_CODE).  */
 static enum rtx_code *bellwether_codes;
@@ -222,7 +222,7 @@
 			    expected_c, actual_c);
 }
 
-/* Implementations of the macro_group callbacks for modes.  */
+/* Implementations of the iterator_group callbacks for modes.  */
 
 static int
 find_mode (const char *name, FILE *infile)
@@ -237,18 +237,18 @@
 }
 
 static bool
-uses_mode_macro_p (rtx x, int mode)
+uses_mode_iterator_p (rtx x, int mode)
 {
   return (int) GET_MODE (x) == mode;
 }
 
 static void
-apply_mode_macro (rtx x, int mode)
+apply_mode_iterator (rtx x, int mode)
 {
   PUT_MODE (x, (enum machine_mode) mode);
 }
 
-/* Implementations of the macro_group callbacks for codes.  */
+/* Implementations of the iterator_group callbacks for codes.  */
 
 static int
 find_code (const char *name, FILE *infile)
@@ -263,42 +263,42 @@
 }
 
 static bool
-uses_code_macro_p (rtx x, int code)
+uses_code_iterator_p (rtx x, int code)
 {
   return (int) GET_CODE (x) == code;
 }
 
 static void
-apply_code_macro (rtx x, int code)
+apply_code_iterator (rtx x, int code)
 {
   PUT_CODE (x, (enum rtx_code) code);
 }
 
 /* Map a code or mode attribute string P to the underlying string for
-   MACRO and VALUE.  */
+   ITERATOR and VALUE.  */
 
 static struct map_value *
-map_attr_string (const char *p, struct mapping *macro, int value)
+map_attr_string (const char *p, struct mapping *iterator, int value)
 {
   const char *attr;
   struct mapping *m;
   struct map_value *v;
 
-  /* If there's a "macro:" prefix, check whether the macro name matches.
+  /* If there's a "iterator:" prefix, check whether the iterator name matches.
      Set ATTR to the start of the attribute name.  */
   attr = strchr (p, ':');
   if (attr == 0)
     attr = p;
   else
     {
-      if (strncmp (p, macro->name, attr - p) != 0
-	  || macro->name[attr - p] != 0)
+      if (strncmp (p, iterator->name, attr - p) != 0
+	  || iterator->name[attr - p] != 0)
 	return 0;
       attr++;
     }
 
   /* Find the attribute specification.  */
-  m = (struct mapping *) htab_find (macro->group->attrs, &attr);
+  m = (struct mapping *) htab_find (iterator->group->attrs, &attr);
   if (m == 0)
     return 0;
 
@@ -312,7 +312,7 @@
 
 /* Given an attribute string used as a machine mode, return an index
    to store in the machine mode to be translated by
-   apply_macro_to_rtx.  */
+   apply_iterator_to_rtx.  */
 
 static unsigned int
 mode_attr_index (struct map_value **mode_maps, const char *string)
@@ -332,27 +332,27 @@
   *mode_maps = mv;
 
   /* We return a code which we can map back into this string: the
-     number of machine modes + the number of mode macros + the index
+     number of machine modes + the number of mode iterators + the index
      we just used.  */
-  return MAX_MACHINE_MODE + htab_elements (modes.macros) + mv->number;
+  return MAX_MACHINE_MODE + htab_elements (modes.iterators) + mv->number;
 }
 
 /* Apply MODE_MAPS to the top level of X, expanding cases where an
-   attribute is used for a mode.  MACRO is the current macro we are
+   attribute is used for a mode.  ITERATOR is the current iterator we are
    expanding, and VALUE is the value to which we are expanding it.
    INFILE is used for error messages.  This sets *UNKNOWN to true if
    we find a mode attribute which has not yet been defined, and does
    not change it otherwise.  */
 
 static void
-apply_mode_maps (rtx x, struct map_value *mode_maps, struct mapping *macro,
+apply_mode_maps (rtx x, struct map_value *mode_maps, struct mapping *iterator,
 		 int value, FILE *infile, const char **unknown)
 {
   unsigned int offset;
   int indx;
   struct map_value *pm;
 
-  offset = MAX_MACHINE_MODE + htab_elements (modes.macros);
+  offset = MAX_MACHINE_MODE + htab_elements (modes.iterators);
   if (GET_MODE (x) < offset)
     return;
 
@@ -363,7 +363,7 @@
 	{
 	  struct map_value *v;
 
-	  v = map_attr_string (pm->string, macro, value);
+	  v = map_attr_string (pm->string, iterator, value);
 	  if (v)
 	    PUT_MODE (x, (enum machine_mode) find_mode (v->string, infile));
 	  else
@@ -373,12 +373,12 @@
     }
 }
 
-/* Given that MACRO is being expanded as VALUE, apply the appropriate
+/* Given that ITERATOR is being expanded as VALUE, apply the appropriate
    string substitutions to STRING.  Return the new string if any changes
    were needed, otherwise return STRING itself.  */
 
 static const char *
-apply_macro_to_string (const char *string, struct mapping *macro, int value)
+apply_iterator_to_string (const char *string, struct mapping *iterator, int value)
 {
   char *base, *copy, *p, *start, *end;
   struct map_value *v;
@@ -392,7 +392,7 @@
       p = start + 1;
 
       *end = 0;
-      v = map_attr_string (p, macro, value);
+      v = map_attr_string (p, iterator, value);
       *end = '>';
       if (v == 0)
 	continue;
@@ -413,18 +413,18 @@
   return string;
 }
 
-/* Return a copy of ORIGINAL in which all uses of MACRO have been
+/* Return a copy of ORIGINAL in which all uses of ITERATOR have been
    replaced by VALUE.  MODE_MAPS holds information about attribute
    strings used for modes.  INFILE is used for error messages.  This
    sets *UNKNOWN_MODE_ATTR to the value of an unknown mode attribute,
    and does not change it otherwise.  */
 
 static rtx
-apply_macro_to_rtx (rtx original, struct mapping *macro, int value,
-		    struct map_value *mode_maps, FILE *infile,
-		    const char **unknown_mode_attr)
+apply_iterator_to_rtx (rtx original, struct mapping *iterator, int value,
+		       struct map_value *mode_maps, FILE *infile,
+		       const char **unknown_mode_attr)
 {
-  struct macro_group *group;
+  struct iterator_group *group;
   const char *format_ptr;
   int i, j;
   rtx x;
@@ -439,12 +439,12 @@
   memcpy (x, original, RTX_CODE_SIZE (bellwether_code));
 
   /* Change the mode or code itself.  */
-  group = macro->group;
-  if (group->uses_macro_p (x, macro->index + group->num_builtins))
-    group->apply_macro (x, value);
+  group = iterator->group;
+  if (group->uses_iterator_p (x, iterator->index + group->num_builtins))
+    group->apply_iterator (x, value);
 
   if (mode_maps)
-    apply_mode_maps (x, mode_maps, macro, value, infile, unknown_mode_attr);
+    apply_mode_maps (x, mode_maps, iterator, value, infile, unknown_mode_attr);
 
   /* Change each string and recursively change each rtx.  */
   format_ptr = GET_RTX_FORMAT (bellwether_code);
@@ -452,18 +452,18 @@
     switch (format_ptr[i])
       {
       case 'T':
-	XTMPL (x, i) = apply_macro_to_string (XTMPL (x, i), macro, value);
+	XTMPL (x, i) = apply_iterator_to_string (XTMPL (x, i), iterator, value);
 	break;
 
       case 'S':
       case 's':
-	XSTR (x, i) = apply_macro_to_string (XSTR (x, i), macro, value);
+	XSTR (x, i) = apply_iterator_to_string (XSTR (x, i), iterator, value);
 	break;
 
       case 'e':
-	XEXP (x, i) = apply_macro_to_rtx (XEXP (x, i), macro, value,
-					  mode_maps, infile,
-					  unknown_mode_attr);
+	XEXP (x, i) = apply_iterator_to_rtx (XEXP (x, i), iterator, value,
+					     mode_maps, infile,
+					     unknown_mode_attr);
 	break;
 
       case 'V':
@@ -472,10 +472,10 @@
 	  {
 	    XVEC (x, i) = rtvec_alloc (XVECLEN (original, i));
 	    for (j = 0; j < XVECLEN (x, i); j++)
-	      XVECEXP (x, i, j) = apply_macro_to_rtx (XVECEXP (original, i, j),
-						      macro, value, mode_maps,
-						      infile,
-						      unknown_mode_attr);
+	      XVECEXP (x, i, j) = apply_iterator_to_rtx (XVECEXP (original, i, j),
+							 iterator, value, mode_maps,
+							 infile,
+							 unknown_mode_attr);
 	  }
 	break;
 
@@ -485,20 +485,20 @@
   return x;
 }
 
-/* Return true if X (or some subexpression of X) uses macro MACRO.  */
+/* Return true if X (or some subexpression of X) uses iterator ITERATOR.  */
 
 static bool
-uses_macro_p (rtx x, struct mapping *macro)
+uses_iterator_p (rtx x, struct mapping *iterator)
 {
-  struct macro_group *group;
+  struct iterator_group *group;
   const char *format_ptr;
   int i, j;
 
   if (x == 0)
     return false;
 
-  group = macro->group;
-  if (group->uses_macro_p (x, macro->index + group->num_builtins))
+  group = iterator->group;
+  if (group->uses_iterator_p (x, iterator->index + group->num_builtins))
     return true;
 
   format_ptr = GET_RTX_FORMAT (BELLWETHER_CODE (GET_CODE (x)));
@@ -506,7 +506,7 @@
     switch (format_ptr[i])
       {
       case 'e':
-	if (uses_macro_p (XEXP (x, i), macro))
+	if (uses_iterator_p (XEXP (x, i), iterator))
 	  return true;
 	break;
 
@@ -514,7 +514,7 @@
       case 'E':
 	if (XVEC (x, i))
 	  for (j = 0; j < XVECLEN (x, i); j++)
-	    if (uses_macro_p (XVECEXP (x, i, j), macro))
+	    if (uses_iterator_p (XVECEXP (x, i, j), iterator))
 	      return true;
 	break;
 
@@ -566,37 +566,37 @@
 }
 
 /* A htab_traverse callback.  Search the EXPR_LIST given by DATA
-   for rtxes that use the macro in *SLOT.  Replace each such rtx
+   for rtxes that use the iterator in *SLOT.  Replace each such rtx
    with a list of expansions.  */
 
 static int
-apply_macro_traverse (void **slot, void *data)
+apply_iterator_traverse (void **slot, void *data)
 {
-  struct macro_traverse_data *mtd = (struct macro_traverse_data *) data;
-  struct mapping *macro;
+  struct iterator_traverse_data *mtd = (struct iterator_traverse_data *) data;
+  struct mapping *iterator;
   struct map_value *v;
   rtx elem, new_elem, original, x;
 
-  macro = (struct mapping *) *slot;
+  iterator = (struct mapping *) *slot;
   for (elem = mtd->queue; elem != 0; elem = XEXP (elem, 1))
-    if (uses_macro_p (XEXP (elem, 0), macro))
+    if (uses_iterator_p (XEXP (elem, 0), iterator))
       {
-	/* For each macro we expand, we set UNKNOWN_MODE_ATTR to NULL.
-	   If apply_macro_rtx finds an unknown attribute for a mode,
+	/* For each iterator we expand, we set UNKNOWN_MODE_ATTR to NULL.
+	   If apply_iterator_rtx finds an unknown attribute for a mode,
 	   it will set it to the attribute.  We want to know whether
 	   the attribute is unknown after we have expanded all
-	   possible macros, so setting it to NULL here gives us the
+	   possible iterators, so setting it to NULL here gives us the
 	   right result when the hash table traversal is complete.  */
 	mtd->unknown_mode_attr = NULL;
 
 	original = XEXP (elem, 0);
-	for (v = macro->values; v != 0; v = v->next)
+	for (v = iterator->values; v != 0; v = v->next)
 	  {
-	    x = apply_macro_to_rtx (original, macro, v->number,
-				    mtd->mode_maps, mtd->infile,
-				    &mtd->unknown_mode_attr);
+	    x = apply_iterator_to_rtx (original, iterator, v->number,
+				       mtd->mode_maps, mtd->infile,
+				       &mtd->unknown_mode_attr);
 	    add_condition_to_rtx (x, v->string);
-	    if (v != macro->values)
+	    if (v != iterator->values)
 	      {
 		/* Insert a new EXPR_LIST node after ELEM and put the
 		   new expansion there.  */
@@ -616,7 +616,7 @@
    is the file that defined the mapping.  */
 
 static struct mapping *
-add_mapping (struct macro_group *group, htab_t table,
+add_mapping (struct iterator_group *group, htab_t table,
 	     const char *name, FILE *infile)
 {
   struct mapping *m;
@@ -657,7 +657,7 @@
 /* Do one-time initialization of the mode and code attributes.  */
 
 static void
-initialize_macros (void)
+initialize_iterators (void)
 {
   struct mapping *lower, *upper;
   struct map_value **lower_ptr, **upper_ptr;
@@ -665,18 +665,18 @@
   int i;
 
   modes.attrs = htab_create (13, def_hash, def_name_eq_p, 0);
-  modes.macros = htab_create (13, def_hash, def_name_eq_p, 0);
+  modes.iterators = htab_create (13, def_hash, def_name_eq_p, 0);
   modes.num_builtins = MAX_MACHINE_MODE;
   modes.find_builtin = find_mode;
-  modes.uses_macro_p = uses_mode_macro_p;
-  modes.apply_macro = apply_mode_macro;
+  modes.uses_iterator_p = uses_mode_iterator_p;
+  modes.apply_iterator = apply_mode_iterator;
 
   codes.attrs = htab_create (13, def_hash, def_name_eq_p, 0);
-  codes.macros = htab_create (13, def_hash, def_name_eq_p, 0);
+  codes.iterators = htab_create (13, def_hash, def_name_eq_p, 0);
   codes.num_builtins = NUM_RTX_CODE;
   codes.find_builtin = find_code;
-  codes.uses_macro_p = uses_code_macro_p;
-  codes.apply_macro = apply_code_macro;
+  codes.uses_iterator_p = uses_code_iterator_p;
+  codes.apply_iterator = apply_code_iterator;
 
   lower = add_mapping (&modes, modes.attrs, "mode", 0);
   upper = add_mapping (&modes, modes.attrs, "MODE", 0);
@@ -1284,11 +1284,11 @@
    identifier.  INFILE is the file that contained NAME.  */
 
 static int
-find_macro (struct macro_group *group, const char *name, FILE *infile)
+find_iterator (struct iterator_group *group, const char *name, FILE *infile)
 {
   struct mapping *m;
 
-  m = (struct mapping *) htab_find (group->macros, &name);
+  m = (struct mapping *) htab_find (group->iterators, &name);
   if (m != 0)
     return m->index + group->num_builtins;
   return group->find_builtin (name, infile);
@@ -1305,7 +1305,7 @@
    (which belongs to GROUP) and return it.  */
 
 static struct mapping *
-read_mapping (struct macro_group *group, htab_t table, FILE *infile)
+read_mapping (struct iterator_group *group, htab_t table, FILE *infile)
 {
   char tmp_char[256];
   struct mapping *m;
@@ -1356,24 +1356,24 @@
   return m;
 }
 
-/* Check newly-created code macro MACRO to see whether every code has the
-   same format.  Initialize the macro's entry in bellwether_codes.  */
+/* Check newly-created code iterator ITERATOR to see whether every code has the
+   same format.  Initialize the iterator's entry in bellwether_codes.  */
 
 static void
-check_code_macro (struct mapping *macro, FILE *infile)
+check_code_iterator (struct mapping *iterator, FILE *infile)
 {
   struct map_value *v;
   enum rtx_code bellwether;
 
-  bellwether = (enum rtx_code) macro->values->number;
-  for (v = macro->values->next; v != 0; v = v->next)
+  bellwether = (enum rtx_code) iterator->values->number;
+  for (v = iterator->values->next; v != 0; v = v->next)
     if (strcmp (GET_RTX_FORMAT (bellwether), GET_RTX_FORMAT (v->number)) != 0)
-      fatal_with_file_and_line (infile, "code macro `%s' combines "
-				"different rtx formats", macro->name);
+      fatal_with_file_and_line (infile, "code iterator `%s' combines "
+				"different rtx formats", iterator->name);
 
   bellwether_codes = XRESIZEVEC (enum rtx_code, bellwether_codes,
-				 macro->index + 1);
-  bellwether_codes[macro->index] = bellwether;
+				 iterator->index + 1);
+  bellwether_codes[iterator->index] = bellwether;
 }
 
 /* Read an rtx in printed representation from INFILE and store its
@@ -1394,7 +1394,7 @@
   /* Do one-time initialization.  */
   if (queue_head == 0)
     {
-      initialize_macros ();
+      initialize_iterators ();
       obstack_init (&string_obstack);
       queue_head = rtx_alloc (EXPR_LIST);
       ptr_locs = htab_create (161, leading_ptr_hash, leading_ptr_eq_p, 0);
@@ -1407,7 +1407,7 @@
   if (queue_next == 0)
     {
       struct map_value *mode_maps;
-      struct macro_traverse_data mtd;
+      struct iterator_traverse_data mtd;
       rtx from_file;
 
       c = read_skip_spaces (infile);
@@ -1431,8 +1431,8 @@
       mtd.mode_maps = mode_maps;
       mtd.infile = infile;
       mtd.unknown_mode_attr = mode_maps ? mode_maps->string : NULL;
-      htab_traverse (modes.macros, apply_macro_traverse, &mtd);
-      htab_traverse (codes.macros, apply_macro_traverse, &mtd);
+      htab_traverse (modes.iterators, apply_iterator_traverse, &mtd);
+      htab_traverse (codes.iterators, apply_iterator_traverse, &mtd);
       if (mtd.unknown_mode_attr)
 	fatal_with_file_and_line (infile,
 				  "undefined attribute '%s' used for mode",
@@ -1447,7 +1447,7 @@
 }
 
 /* Subroutine of read_rtx that reads one construct from INFILE but
-   doesn't apply any macros.  */
+   doesn't apply any iterators.  */
 
 static rtx
 read_rtx_1 (FILE *infile, struct map_value **mode_maps)
@@ -1504,9 +1504,9 @@
       read_mapping (&modes, modes.attrs, infile);
       goto again;
     }
-  if (strcmp (tmp_char, "define_mode_macro") == 0)
+  if (strcmp (tmp_char, "define_mode_iterator") == 0)
     {
-      read_mapping (&modes, modes.macros, infile);
+      read_mapping (&modes, modes.iterators, infile);
       goto again;
     }
   if (strcmp (tmp_char, "define_code_attr") == 0)
@@ -1514,12 +1514,13 @@
       read_mapping (&codes, codes.attrs, infile);
       goto again;
     }
-  if (strcmp (tmp_char, "define_code_macro") == 0)
+  if (strcmp (tmp_char, "define_code_iterator") == 0)
     {
-      check_code_macro (read_mapping (&codes, codes.macros, infile), infile);
+      check_code_iterator (read_mapping (&codes, codes.iterators, infile),
+			   infile);
       goto again;
     }
-  real_code = (enum rtx_code) find_macro (&codes, tmp_char, infile);
+  real_code = (enum rtx_code) find_iterator (&codes, tmp_char, infile);
   bellwether_code = BELLWETHER_CODE (real_code);
 
   /* If we end up with an insn expression then we free this space below.  */
@@ -1537,7 +1538,7 @@
 
       read_name (tmp_char, infile);
       if (tmp_char[0] != '<' || tmp_char[strlen (tmp_char) - 1] != '>')
-	mode = find_macro (&modes, tmp_char, infile);
+	mode = find_iterator (&modes, tmp_char, infile);
       else
 	mode = mode_attr_index (mode_maps, tmp_char);
       PUT_MODE (return_rtx, (enum machine_mode) mode);
Index: gcc/config/alpha/sync.md
===================================================================
--- gcc/config/alpha/sync.md	(revision 127652)
+++ gcc/config/alpha/sync.md	(working copy)
@@ -17,7 +17,7 @@
 ;; along with GCC; see the file COPYING3.  If not see
 ;; <http://www.gnu.org/licenses/>.
 
-(define_code_macro FETCHOP [plus minus ior xor and])
+(define_code_iterator FETCHOP [plus minus ior xor and])
 (define_code_attr fetchop_name
   [(plus "add") (minus "sub") (ior "ior") (xor "xor") (and "and")])
 (define_code_attr fetchop_pred
Index: gcc/config/alpha/alpha.md
===================================================================
--- gcc/config/alpha/alpha.md	(revision 127652)
+++ gcc/config/alpha/alpha.md	(working copy)
@@ -88,12 +88,12 @@
 
 ;; On non-BWX targets, CQImode must be handled the similarly to HImode
 ;; when generating reloads.
-(define_mode_macro RELOAD12 [QI HI CQI])
+(define_mode_iterator RELOAD12 [QI HI CQI])
 (define_mode_attr reloadmode [(QI "qi") (HI "hi") (CQI "hi")])
 
-;; Other mode macros
-(define_mode_macro I12MODE [QI HI])
-(define_mode_macro I48MODE [SI DI])
+;; Other mode iterators
+(define_mode_iterator I12MODE [QI HI])
+(define_mode_iterator I48MODE [SI DI])
 (define_mode_attr modesuffix [(SI "l") (DI "q")])
 
 ;; Where necessary, the suffixes _le and _be are used to distinguish between
@@ -6253,7 +6253,7 @@
 
 ;; Vector operations
 
-(define_mode_macro VEC [V8QI V4HI V2SI])
+(define_mode_iterator VEC [V8QI V4HI V2SI])
 
 (define_expand "mov<mode>"
   [(set (match_operand:VEC 0 "nonimmediate_operand" "")
Index: gcc/config/frv/frv.md
===================================================================
--- gcc/config/frv/frv.md	(revision 127652)
+++ gcc/config/frv/frv.md	(working copy)
@@ -86,7 +86,7 @@
    (FDPIC_REG			15)
    ])
 
-(define_mode_macro IMODE [QI HI SI DI])
+(define_mode_iterator IMODE [QI HI SI DI])
 (define_mode_attr IMODEsuffix [(QI "b") (HI "h") (SI "") (DI "d")])
 (define_mode_attr BREADsuffix [(QI "ub") (HI "uh") (SI "") (DI "d")])
 
Index: gcc/config/s390/s390.md
===================================================================
--- gcc/config/s390/s390.md	(revision 127652)
+++ gcc/config/s390/s390.md	(working copy)
@@ -246,54 +246,54 @@
 ;; Other includes
 (include "tpf.md")
 
-;; Macros
+;; Iterators
 
-;; This mode macro allows floating point patterns to be generated from the
+;; These mode iterators allow floating point patterns to be generated from the
 ;; same template.
-(define_mode_macro FP [TF DF SF (TD "TARGET_HARD_DFP") (DD "TARGET_HARD_DFP")])
-(define_mode_macro BFP [TF DF SF])
-(define_mode_macro DFP [TD DD])
-(define_mode_macro DFP_ALL [TD DD SD])
-(define_mode_macro DSF [DF SF])
-(define_mode_macro SD_SF [SF SD])
-(define_mode_macro DD_DF [DF DD])
-(define_mode_macro TD_TF [TF TD])
+(define_mode_iterator FP [TF DF SF (TD "TARGET_HARD_DFP") (DD "TARGET_HARD_DFP")])
+(define_mode_iterator BFP [TF DF SF])
+(define_mode_iterator DFP [TD DD])
+(define_mode_iterator DFP_ALL [TD DD SD])
+(define_mode_iterator DSF [DF SF])
+(define_mode_iterator SD_SF [SF SD])
+(define_mode_iterator DD_DF [DF DD])
+(define_mode_iterator TD_TF [TF TD])
 
-;; These mode macros allow 31-bit and 64-bit TDSI patterns to be generated
+;; This mode iterator allows 31-bit and 64-bit TDSI patterns to be generated
 ;; from the same template.
-(define_mode_macro TDSI [(TI "TARGET_64BIT") DI SI])
+(define_mode_iterator TDSI [(TI "TARGET_64BIT") DI SI])
 
-;; These mode macros allow 31-bit and 64-bit GPR patterns to be generated
+;; These mode iterators allow 31-bit and 64-bit GPR patterns to be generated
 ;; from the same template.
-(define_mode_macro GPR [(DI "TARGET_64BIT") SI])
-(define_mode_macro DSI [DI SI])
+(define_mode_iterator GPR [(DI "TARGET_64BIT") SI])
+(define_mode_iterator DSI [DI SI])
 
-;; This mode macro allows :P to be used for patterns that operate on
+;; These mode iterators allow :P to be used for patterns that operate on
 ;; pointer-sized quantities.  Exactly one of the two alternatives will match.
-(define_mode_macro DP  [(TI "TARGET_64BIT") (DI "!TARGET_64BIT")])
-(define_mode_macro P [(DI "TARGET_64BIT") (SI "!TARGET_64BIT")])
+(define_mode_iterator DP  [(TI "TARGET_64BIT") (DI "!TARGET_64BIT")])
+(define_mode_iterator P [(DI "TARGET_64BIT") (SI "!TARGET_64BIT")])
 
-;; This mode macro allows the QI and HI patterns to be defined from
+;; This mode iterator allows the QI and HI patterns to be defined from
 ;; the same template.
-(define_mode_macro HQI [HI QI])
+(define_mode_iterator HQI [HI QI])
 
-;; This mode macro allows the integer patterns to be defined from the
+;; This mode iterator allows the integer patterns to be defined from the
 ;; same template.
-(define_mode_macro INT [(DI "TARGET_64BIT") SI HI QI])
+(define_mode_iterator INT [(DI "TARGET_64BIT") SI HI QI])
 
-;; This macro allows to unify all 'bCOND' expander patterns.
-(define_code_macro COMPARE [eq ne gt gtu lt ltu ge geu le leu unordered 
+;; This iterator allows to unify all 'bCOND' expander patterns.
+(define_code_iterator COMPARE [eq ne gt gtu lt ltu ge geu le leu unordered 
 		            ordered uneq unlt ungt unle unge ltgt])
 
-;; This macro allows to unify all 'sCOND' patterns.
-(define_code_macro SCOND [ltu gtu leu geu])
+;; This iterator allows to unify all 'sCOND' patterns.
+(define_code_iterator SCOND [ltu gtu leu geu])
 
-;; This macro allows some 'ashift' and 'lshiftrt' pattern to be defined from
+;; This iterator allows some 'ashift' and 'lshiftrt' pattern to be defined from
 ;; the same template.
-(define_code_macro SHIFT [ashift lshiftrt])
+(define_code_iterator SHIFT [ashift lshiftrt])
 
-;; These macros allow to combine most atomic operations.
-(define_code_macro ATOMIC [and ior xor plus minus mult])
+;; This iterator and attribute allow to combine most atomic operations.
+(define_code_iterator ATOMIC [and ior xor plus minus mult])
 (define_code_attr atomic [(and "and") (ior "ior") (xor "xor") 
 			  (plus "add") (minus "sub") (mult "nand")])
 
@@ -312,18 +312,18 @@
 (define_mode_attr RXe [(TF "RXE") (DF "RX") (SF "RX")])
 
 ;; The decimal floating point variants of add, sub, div and mul support 3
-;; fp register operands.  The following macros allow to merge the bfp and
+;; fp register operands.  The following attributes allow to merge the bfp and
 ;; dfp variants in a single insn definition.
 
-;; This macro is used to set op_type accordingly.
+;; This attribute is used to set op_type accordingly.
 (define_mode_attr RRer [(TF "RRE") (DF "RRE") (SF "RRE") (TD "RRR") 
                         (DD "RRR") (SD "RRR")])
 
-;; This macro is used in the operand constraint list in order to have the 
+;; This attribute is used in the operand constraint list in order to have the 
 ;; first and the second operand match for bfp modes.
 (define_mode_attr f0 [(TF "0") (DF "0") (SF "0") (TD "f") (DD "f") (DD "f")])
 
-;; This macro is used in the operand list of the instruction to have an 
+;; This attribute is used in the operand list of the instruction to have an 
 ;; additional operand for the dfp instructions.
 (define_mode_attr op1 [(TF "") (DF "") (SF "")
                        (TD "%1,") (DD "%1,") (SD "%1,")])
@@ -341,7 +341,7 @@
 ;; This is used to disable the memory alternative in TFmode patterns.
 (define_mode_attr Rf [(TF "f") (DF "R") (SF "R") (TD "f") (DD "f") (SD "f")])
 
-;; This macro adds b for bfp instructions and t for dfp instructions and is used
+;; This attribute adds b for bfp instructions and t for dfp instructions and is used
 ;; within instruction mnemonics.
 (define_mode_attr bt [(TF "b") (DF "b") (SF "b") (TD "t") (DD "t") (SD "t")])
 
Index: gcc/config/m32c/blkmov.md
===================================================================
--- gcc/config/m32c/blkmov.md	(revision 127652)
+++ gcc/config/m32c/blkmov.md	(working copy)
@@ -51,7 +51,7 @@
   "if (m32c_expand_movmemhi(operands)) DONE; FAIL;"
   )
 
-;; We can't use mode macros for these because M16C uses r1h to extend
+;; We can't use mode iterators for these because M16C uses r1h to extend
 ;; the source address, for copying data from ROM to RAM.  We don't yet
 ;; support that, but we need to zero our r1h, so the patterns differ.
 
Index: gcc/config/m32c/m32c.md
===================================================================
--- gcc/config/m32c/m32c.md	(revision 127652)
+++ gcc/config/m32c/m32c.md	(working copy)
@@ -54,15 +54,15 @@
 (define_attr "flags" "x,c,z,zc,s,sc,sz,szc,o,oc,oz,ozc,os,osc,osz,oszc,n" (const_string "n"))
 (define_asm_attributes [(set_attr "flags" "x")])
 
-(define_mode_macro QHI [QI HI])
-(define_mode_macro HPSI [(HI "TARGET_A16") (PSI "TARGET_A24")])
-(define_mode_macro QHPSI [QI HI (PSI "TARGET_A24")])
-(define_mode_macro QHSI [QI HI (SI "TARGET_A24")])
+(define_mode_iterator QHI [QI HI])
+(define_mode_iterator HPSI [(HI "TARGET_A16") (PSI "TARGET_A24")])
+(define_mode_iterator QHPSI [QI HI (PSI "TARGET_A24")])
+(define_mode_iterator QHSI [QI HI (SI "TARGET_A24")])
 (define_mode_attr bwl [(QI "b") (HI "w") (PSI "l") (SI "l")])
 
-(define_code_macro any_cond [eq ne gt ge lt le gtu geu ltu leu])
-(define_code_macro eqne_cond [eq ne])
-(define_code_macro gl_cond [gt ge lt le gtu geu ltu leu])
+(define_code_iterator any_cond [eq ne gt ge lt le gtu geu ltu leu])
+(define_code_iterator eqne_cond [eq ne])
+(define_code_iterator gl_cond [gt ge lt le gtu geu ltu leu])
 
 
 
Index: gcc/config/spu/spu.md
===================================================================
--- gcc/config/spu/spu.md	(revision 127652)
+++ gcc/config/spu/spu.md	(working copy)
@@ -159,9 +159,9 @@
 (include "constraints.md")
 
 
-;; Mode macros
+;; Mode iterators
 
-(define_mode_macro ALL [QI V16QI
+(define_mode_iterator ALL [QI V16QI
 			HI V8HI
 			SI V4SI
 			DI V2DI
@@ -171,43 +171,43 @@
 
 ; Everything except DI and TI which are handled separately because
 ; they need different constraints to correctly test VOIDmode constants
-(define_mode_macro MOV [QI V16QI
+(define_mode_iterator MOV [QI V16QI
 			HI V8HI
 			SI V4SI
 			V2DI
                         SF V4SF
                         DF V2DF])
 
-(define_mode_macro DTI  [DI TI])
+(define_mode_iterator DTI  [DI TI])
 
-(define_mode_macro VINT [QI V16QI
+(define_mode_iterator VINT [QI V16QI
 			 HI V8HI
 			 SI V4SI
 			 DI V2DI
 			 TI])
 
-(define_mode_macro VQHSI [QI V16QI
+(define_mode_iterator VQHSI [QI V16QI
 			  HI V8HI
 			  SI V4SI])
 
-(define_mode_macro VHSI [HI V8HI
+(define_mode_iterator VHSI [HI V8HI
 			 SI V4SI])
 
-(define_mode_macro VSDF [SF V4SF
+(define_mode_iterator VSDF [SF V4SF
                          DF V2DF])
 
-(define_mode_macro VSI [SI V4SI])
-(define_mode_macro VDI [DI V2DI])
-(define_mode_macro VSF [SF V4SF])
-(define_mode_macro VDF [DF V2DF])
+(define_mode_iterator VSI [SI V4SI])
+(define_mode_iterator VDI [DI V2DI])
+(define_mode_iterator VSF [SF V4SF])
+(define_mode_iterator VDF [DF V2DF])
 
-(define_mode_macro VCMP [V16QI
+(define_mode_iterator VCMP [V16QI
 			 V8HI
 			 V4SI
                          V4SF
                          V2DF])
 
-(define_mode_macro VCMPU [V16QI
+(define_mode_iterator VCMPU [V16QI
 			  V8HI
 			  V4SI])
 
@@ -233,10 +233,10 @@
 		          (SI "G")  (V4SI "G")])
 
 ;; Used for carry and borrow instructions.
-(define_mode_macro CBOP  [SI DI V4SI V2DI])
+(define_mode_iterator CBOP  [SI DI V4SI V2DI])
 
 ;; Used in vec_set and vec_extract
-(define_mode_macro V [V2DI V4SI V8HI V16QI V2DF V4SF])
+(define_mode_iterator V [V2DI V4SI V8HI V16QI V2DF V4SF])
 (define_mode_attr inner  [(V16QI "QI")
 			  (V8HI  "HI")
 			  (V4SI  "SI")
Index: gcc/config/sparc/sparc.md
===================================================================
--- gcc/config/sparc/sparc.md	(revision 127652)
+++ gcc/config/sparc/sparc.md	(working copy)
@@ -1701,7 +1701,7 @@
    (set_attr "branch_type" "reg")])
 
 
-(define_mode_macro P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
+(define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
 
 ;; Load in operand 0 the (absolute) address of operand 1, which is a symbolic
 ;; value subject to a PC-relative relocation.  Operand 2 is a helper function
@@ -2340,7 +2340,7 @@
 ;; Floating point and vector move instructions
 
 ;; We don't define V1SI because SI should work just fine.
-(define_mode_macro V32 [SF V2HI V4QI])
+(define_mode_iterator V32 [SF V2HI V4QI])
 
 ;; Yes, you guessed it right, the former movsf expander.
 (define_expand "mov<V32:mode>"
@@ -2476,7 +2476,7 @@
   [(set (match_dup 0) (high:SF (match_dup 1)))
    (set (match_dup 0) (lo_sum:SF (match_dup 0) (match_dup 1)))])
 
-(define_mode_macro V64 [DF V2SI V4HI V8QI])
+(define_mode_iterator V64 [DF V2SI V4HI V8QI])
 
 ;; Yes, you again guessed it right, the former movdf expander.
 (define_expand "mov<V64:mode>"
@@ -5276,8 +5276,8 @@
 ;; We define DImode `and' so with DImode `not' we can get
 ;; DImode `andn'.  Other combinations are possible.
 
-(define_mode_macro V64I [DI V2SI V4HI V8QI])
-(define_mode_macro V32I [SI V2HI V4QI])
+(define_mode_iterator V64I [DI V2SI V4HI V8QI])
+(define_mode_iterator V32I [SI V2HI V4QI])
 
 (define_expand "and<V64I:mode>3"
   [(set (match_operand:V64I 0 "register_operand" "")
Index: gcc/config/sparc/sync.md
===================================================================
--- gcc/config/sparc/sync.md	(revision 127652)
+++ gcc/config/sparc/sync.md	(working copy)
@@ -18,9 +18,9 @@
 ;; along with GCC; see the file COPYING3.  If not see
 ;; <http://www.gnu.org/licenses/>.
 
-(define_mode_macro I12MODE [QI HI])
-(define_mode_macro I24MODE [HI SI])
-(define_mode_macro I48MODE [SI (DI "TARGET_ARCH64 || TARGET_V8PLUS")])
+(define_mode_iterator I12MODE [QI HI])
+(define_mode_iterator I24MODE [HI SI])
+(define_mode_iterator I48MODE [SI (DI "TARGET_ARCH64 || TARGET_V8PLUS")])
 (define_mode_attr modesuffix [(SI "") (DI "x")])
 
 (define_expand "memory_barrier"
Index: gcc/config/i386/i386.md
===================================================================
--- gcc/config/i386/i386.md	(revision 127652)
+++ gcc/config/i386/i386.md	(working copy)
@@ -488,7 +488,7 @@
   [(set_attr "length" "128")
    (set_attr "type" "multi")])
 
-(define_code_macro plusminus [plus minus])
+(define_code_iterator plusminus [plus minus])
 
 ;; Base name for define_insn and insn mnemonic.
 (define_code_attr addsub [(plus "add") (minus "sub")])
@@ -497,7 +497,7 @@
 (define_code_attr comm [(plus "%") (minus "")])
 
 ;; All single word integer modes.
-(define_mode_macro SWI [QI HI SI (DI "TARGET_64BIT")])
+(define_mode_iterator SWI [QI HI SI (DI "TARGET_64BIT")])
 
 ;; Instruction suffix for integer modes.
 (define_mode_attr imodesuffix [(QI "b") (HI "w") (SI "l") (DI "q")])
@@ -516,22 +516,22 @@
 	 (DI "x86_64_general_operand")])
 
 ;; All x87 floating point modes
-(define_mode_macro X87MODEF [SF DF XF])
+(define_mode_iterator X87MODEF [SF DF XF])
 
 ;; x87 SFmode and DFMode floating point modes
-(define_mode_macro X87MODEF12 [SF DF])
+(define_mode_iterator X87MODEF12 [SF DF])
 
 ;; All integer modes handled by x87 fisttp operator.
-(define_mode_macro X87MODEI [HI SI DI])
+(define_mode_iterator X87MODEI [HI SI DI])
 
 ;; All integer modes handled by integer x87 operators.
-(define_mode_macro X87MODEI12 [HI SI])
+(define_mode_iterator X87MODEI12 [HI SI])
 
 ;; All SSE floating point modes
-(define_mode_macro SSEMODEF [SF DF])
+(define_mode_iterator SSEMODEF [SF DF])
 
 ;; All integer modes handled by SSE cvtts?2si* operators.
-(define_mode_macro SSEMODEI24 [SI DI])
+(define_mode_iterator SSEMODEI24 [SI DI])
 
 ;; SSE asm suffix for floating point modes
 (define_mode_attr ssemodefsuffix [(SF "s") (DF "d")])
@@ -10085,7 +10085,7 @@
 
 ;; Copysign instructions
 
-(define_mode_macro CSGNMODE [SF DF TF])
+(define_mode_iterator CSGNMODE [SF DF TF])
 (define_mode_attr CSGNVMODE [(SF "V4SF") (DF "V2DF") (TF "TF")])
 
 (define_expand "copysign<mode>3"
@@ -21009,7 +21009,7 @@
   }
   [(set_attr "type" "multi")])
 
-(define_mode_macro CRC32MODE [QI HI SI])
+(define_mode_iterator CRC32MODE [QI HI SI])
 (define_mode_attr crc32modesuffix [(QI "b") (HI "w") (SI "l")])
 (define_mode_attr crc32modeconstraint [(QI "qm") (HI "rm") (SI "rm")])
 
Index: gcc/config/i386/mmx.md
===================================================================
--- gcc/config/i386/mmx.md	(revision 127652)
+++ gcc/config/i386/mmx.md	(working copy)
@@ -31,14 +31,14 @@
 ;; direction of the user via a builtin.
 
 ;; 8 byte integral modes handled by MMX (and by extension, SSE)
-(define_mode_macro MMXMODEI [V8QI V4HI V2SI])
+(define_mode_iterator MMXMODEI [V8QI V4HI V2SI])
 
 ;; All 8-byte vector modes handled by MMX
-(define_mode_macro MMXMODE [V8QI V4HI V2SI V2SF])
+(define_mode_iterator MMXMODE [V8QI V4HI V2SI V2SF])
 
 ;; Mix-n-match
-(define_mode_macro MMXMODE12 [V8QI V4HI])
-(define_mode_macro MMXMODE24 [V4HI V2SI])
+(define_mode_iterator MMXMODE12 [V8QI V4HI])
+(define_mode_iterator MMXMODE24 [V4HI V2SI])
 
 ;; Mapping from integer vector mode to mnemonic suffix
 (define_mode_attr mmxvecsize [(V8QI "b") (V4HI "w") (V2SI "d") (DI "q")])
Index: gcc/config/i386/sse.md
===================================================================
--- gcc/config/i386/sse.md	(revision 127652)
+++ gcc/config/i386/sse.md	(working copy)
@@ -21,17 +21,17 @@
 
 ;; 16 byte integral modes handled by SSE, minus TImode, which gets
 ;; special-cased for TARGET_64BIT.
-(define_mode_macro SSEMODEI [V16QI V8HI V4SI V2DI])
+(define_mode_iterator SSEMODEI [V16QI V8HI V4SI V2DI])
 
 ;; All 16-byte vector modes handled by SSE
-(define_mode_macro SSEMODE [V16QI V8HI V4SI V2DI V4SF V2DF])
+(define_mode_iterator SSEMODE [V16QI V8HI V4SI V2DI V4SF V2DF])
 
 ;; Mix-n-match
-(define_mode_macro SSEMODE12 [V16QI V8HI])
-(define_mode_macro SSEMODE24 [V8HI V4SI])
-(define_mode_macro SSEMODE14 [V16QI V4SI])
-(define_mode_macro SSEMODE124 [V16QI V8HI V4SI])
-(define_mode_macro SSEMODE248 [V8HI V4SI V2DI])
+(define_mode_iterator SSEMODE12 [V16QI V8HI])
+(define_mode_iterator SSEMODE24 [V8HI V4SI])
+(define_mode_iterator SSEMODE14 [V16QI V4SI])
+(define_mode_iterator SSEMODE124 [V16QI V8HI V4SI])
+(define_mode_iterator SSEMODE248 [V8HI V4SI V2DI])
 
 ;; Mapping from integer vector mode to mnemonic suffix
 (define_mode_attr ssevecsize [(V16QI "b") (V8HI "w") (V4SI "d") (V2DI "q")])
Index: gcc/config/i386/sync.md
===================================================================
--- gcc/config/i386/sync.md	(revision 127652)
+++ gcc/config/i386/sync.md	(working copy)
@@ -18,14 +18,14 @@
 ;; along with GCC; see the file COPYING3.  If not see
 ;; <http://www.gnu.org/licenses/>.
 
-(define_mode_macro IMODE [QI HI SI (DI "TARGET_64BIT")])
+(define_mode_iterator IMODE [QI HI SI (DI "TARGET_64BIT")])
 (define_mode_attr modesuffix [(QI "b") (HI "w") (SI "l") (DI "q")])
 (define_mode_attr modeconstraint [(QI "q") (HI "r") (SI "r") (DI "r")])
 (define_mode_attr immconstraint [(QI "i") (HI "i") (SI "i") (DI "e")])
 
-(define_mode_macro CASMODE [QI HI SI (DI "TARGET_64BIT || TARGET_CMPXCHG8B")
+(define_mode_iterator CASMODE [QI HI SI (DI "TARGET_64BIT || TARGET_CMPXCHG8B")
 			   (TI "TARGET_64BIT && TARGET_CMPXCHG16B")])
-(define_mode_macro DCASMODE
+(define_mode_iterator DCASMODE
   [(DI "!TARGET_64BIT && TARGET_CMPXCHG8B && !flag_pic")
    (TI "TARGET_64BIT && TARGET_CMPXCHG16B")])
 (define_mode_attr doublemodesuffix [(DI "8") (TI "16")])
Index: gcc/config/crx/crx.md
===================================================================
--- gcc/config/crx/crx.md	(revision 127652)
+++ gcc/config/crx/crx.md	(working copy)
@@ -73,12 +73,12 @@
 
 ;;  Mode Macro Definitions
 
-(define_mode_macro ALLMT [QI HI SI SF DI DF])
-(define_mode_macro CRXMM [QI HI SI SF])
-(define_mode_macro CRXIM [QI HI SI])
-(define_mode_macro DIDFM [DI DF])
-(define_mode_macro SISFM [SI SF])
-(define_mode_macro SHORT [QI HI])
+(define_mode_iterator ALLMT [QI HI SI SF DI DF])
+(define_mode_iterator CRXMM [QI HI SI SF])
+(define_mode_iterator CRXIM [QI HI SI])
+(define_mode_iterator DIDFM [DI DF])
+(define_mode_iterator SISFM [SI SF])
+(define_mode_iterator SHORT [QI HI])
 
 (define_mode_attr tIsa [(QI "b") (HI "w") (SI "d") (SF "d")])
 (define_mode_attr lImmArith [(QI "4") (HI "4") (SI "6")])
@@ -94,20 +94,20 @@
 
 ;;  Code Macro Definitions
 
-(define_code_macro sz_xtnd [sign_extend zero_extend])
+(define_code_iterator sz_xtnd [sign_extend zero_extend])
 (define_code_attr sIsa [(sign_extend "") (zero_extend "u")])
 (define_code_attr sPat [(sign_extend "s") (zero_extend "u")])
 (define_code_attr szPat [(sign_extend "") (zero_extend "zero_")])
 (define_code_attr szIsa [(sign_extend "s") (zero_extend "z")])
 
-(define_code_macro sh_oprnd [ashift ashiftrt lshiftrt])
+(define_code_iterator sh_oprnd [ashift ashiftrt lshiftrt])
 (define_code_attr shIsa [(ashift "ll") (ashiftrt "ra") (lshiftrt "rl")])
 (define_code_attr shPat [(ashift "ashl") (ashiftrt "ashr") (lshiftrt "lshr")])
 
-(define_code_macro mima_oprnd [smax umax smin umin])
+(define_code_iterator mima_oprnd [smax umax smin umin])
 (define_code_attr mimaIsa [(smax "maxs") (umax "maxu") (smin "mins") (umin "minu")])
 
-(define_code_macro any_cond [eq ne gt gtu lt ltu ge geu le leu])
+(define_code_iterator any_cond [eq ne gt gtu lt ltu ge geu le leu])
 
 ;;  Addition Instructions
 
Index: gcc/config/xtensa/xtensa.md
===================================================================
--- gcc/config/xtensa/xtensa.md	(revision 127652)
+++ gcc/config/xtensa/xtensa.md	(working copy)
@@ -37,9 +37,9 @@
   (UNSPECV_S32C1I	5)
 ])
 
-;; This code macro allows signed and unsigned widening multiplications
+;; This code iterator allows signed and unsigned widening multiplications
 ;; to use the same template.
-(define_code_macro any_extend [sign_extend zero_extend])
+(define_code_iterator any_extend [sign_extend zero_extend])
 
 ;; <u> expands to an empty string when doing a signed operation and
 ;; "u" when doing an unsigned operation.
@@ -48,32 +48,32 @@
 ;; <su> is like <u>, but the signed form expands to "s" rather than "".
 (define_code_attr su [(sign_extend "s") (zero_extend "u")])
 
-;; This code macro allows four integer min/max operations to be
+;; This code iterator allows four integer min/max operations to be
 ;; generated from one template.
-(define_code_macro any_minmax [smin umin smax umax])
+(define_code_iterator any_minmax [smin umin smax umax])
 
 ;; <minmax> expands to the opcode name for any_minmax operations.
 (define_code_attr minmax [(smin "min") (umin "minu")
 			  (smax "max") (umax "maxu")])
 
-;; This code macro allows all branch instructions to be generated from
+;; This code iterator allows all branch instructions to be generated from
 ;; a single define_expand template.
-(define_code_macro any_cond [eq ne gt ge lt le gtu geu ltu leu])
+(define_code_iterator any_cond [eq ne gt ge lt le gtu geu ltu leu])
 
-;; This code macro is for setting a register from a comparison.
-(define_code_macro any_scc [eq ne gt ge lt le])
+;; This code iterator is for setting a register from a comparison.
+(define_code_iterator any_scc [eq ne gt ge lt le])
 
-;; This code macro is for floating-point comparisons.
-(define_code_macro any_scc_sf [eq lt le])
+;; This code iterator is for floating-point comparisons.
+(define_code_iterator any_scc_sf [eq lt le])
 
-;; These macros allow to combine most atomic operations.
-(define_code_macro ATOMIC [and ior xor plus minus mult])
+;; This iterator and attribute allow to combine most atomic operations.
+(define_code_iterator ATOMIC [and ior xor plus minus mult])
 (define_code_attr atomic [(and "and") (ior "ior") (xor "xor") 
 			  (plus "add") (minus "sub") (mult "nand")])
 
-;; These mode macros allow the HI and QI patterns to be defined from
+;; This mode iterator allows the HI and QI patterns to be defined from
 ;; the same template.
-(define_mode_macro HQI [HI QI])
+(define_mode_iterator HQI [HI QI])
 
 
 ;; Attributes.
Index: gcc/config/cris/cris.c
===================================================================
--- gcc/config/cris/cris.c	(revision 127652)
+++ gcc/config/cris/cris.c	(working copy)
@@ -870,9 +870,8 @@
 
     case 'e':
       /* Like 'E', but ignore state set by 'x'.  FIXME: Use code
-	 iterators ("code macros") and attributes in cris.md to avoid
-	 the need for %x and %E (and %e) and state passed between
-	 those modifiers.  */
+	 iterators and attributes in cris.md to avoid the need for %x
+	 and %E (and %e) and state passed between those modifiers.  */
       cris_output_insn_is_bound = 0;
       /* FALL THROUGH.  */
     case 'E':
Index: gcc/config/cris/cris.md
===================================================================
--- gcc/config/cris/cris.md	(revision 127652)
+++ gcc/config/cris/cris.md	(working copy)
@@ -150,9 +150,9 @@
 ;; Iterator definitions.
 
 ;; For the "usual" pattern size alternatives.
-(define_mode_macro BWD [SI HI QI])
-(define_mode_macro WD [SI HI])
-(define_mode_macro BW [HI QI])
+(define_mode_iterator BWD [SI HI QI])
+(define_mode_iterator WD [SI HI])
+(define_mode_iterator BW [HI QI])
 (define_mode_attr S [(SI "HI") (HI "QI")])
 (define_mode_attr s [(SI "hi") (HI "qi")])
 (define_mode_attr m [(SI ".d") (HI ".w") (QI ".b")])
@@ -160,19 +160,19 @@
 (define_mode_attr nbitsm1 [(SI "31") (HI "15") (QI "7")])
 
 ;; For the sign_extend+zero_extend variants.
-(define_code_macro szext [sign_extend zero_extend])
+(define_code_iterator szext [sign_extend zero_extend])
 (define_code_attr u [(sign_extend "") (zero_extend "u")])
 (define_code_attr su [(sign_extend "s") (zero_extend "u")])
 
 ;; For the shift variants.
-(define_code_macro shift [ashiftrt lshiftrt ashift])
-(define_code_macro shiftrt [ashiftrt lshiftrt])
+(define_code_iterator shift [ashiftrt lshiftrt ashift])
+(define_code_iterator shiftrt [ashiftrt lshiftrt])
 (define_code_attr shlr [(ashiftrt "ashr") (lshiftrt "lshr") (ashift "ashl")])
 (define_code_attr slr [(ashiftrt "asr") (lshiftrt "lsr") (ashift "lsl")])
 
-(define_code_macro ncond [eq ne gtu ltu geu leu])
-(define_code_macro ocond [gt le])
-(define_code_macro rcond [lt ge])
+(define_code_iterator ncond [eq ne gtu ltu geu leu])
+(define_code_iterator ocond [gt le])
+(define_code_iterator rcond [lt ge])
 (define_code_attr CC [(eq "eq") (ne "ne") (gt "gt") (gtu "hi") (lt "lt")
 		      (ltu "lo") (ge "ge") (geu "hs") (le "le") (leu "ls")])
 (define_code_attr rCC [(eq "ne") (ne "eq") (gt "le") (gtu "ls") (lt "ge")
Index: gcc/config/ia64/sync.md
===================================================================
--- gcc/config/ia64/sync.md	(revision 127652)
+++ gcc/config/ia64/sync.md	(working copy)
@@ -18,12 +18,12 @@
 ;; along with GCC; see the file COPYING3.  If not see
 ;; <http://www.gnu.org/licenses/>.
 
-(define_mode_macro IMODE [QI HI SI DI])
-(define_mode_macro I124MODE [QI HI SI])
-(define_mode_macro I48MODE [SI DI])
+(define_mode_iterator IMODE [QI HI SI DI])
+(define_mode_iterator I124MODE [QI HI SI])
+(define_mode_iterator I48MODE [SI DI])
 (define_mode_attr modesuffix [(QI "1") (HI "2") (SI "4") (DI "8")])
 
-(define_code_macro FETCHOP [plus minus ior xor and])
+(define_code_iterator FETCHOP [plus minus ior xor and])
 (define_code_attr fetchop_name
   [(plus "add") (minus "sub") (ior "ior") (xor "xor") (and "and")])
 
Index: gcc/config/ia64/div.md
===================================================================
--- gcc/config/ia64/div.md	(revision 127652)
+++ gcc/config/ia64/div.md	(working copy)
@@ -158,7 +158,7 @@
 ;; to be written for RFmode only and to not have to handle multiple
 ;; modes or to have to handle a register in more than one mode.
 
-(define_mode_macro SDX_F [SF DF XF])
+(define_mode_iterator SDX_F [SF DF XF])
 
 (define_insn "extend<mode>rf2"
   [(set (match_operand:RF 0 "fr_register_operand" "=f")
Index: gcc/config/ia64/vect.md
===================================================================
--- gcc/config/ia64/vect.md	(revision 127652)
+++ gcc/config/ia64/vect.md	(working copy)
@@ -20,9 +20,9 @@
 
 ;; Integer vector operations
 
-(define_mode_macro VECINT [V8QI V4HI V2SI])
-(define_mode_macro VECINT12 [V8QI V4HI])
-(define_mode_macro VECINT24 [V4HI V2SI])
+(define_mode_iterator VECINT [V8QI V4HI V2SI])
+(define_mode_iterator VECINT12 [V8QI V4HI])
+(define_mode_iterator VECINT24 [V4HI V2SI])
 (define_mode_attr vecsize [(V8QI "1") (V4HI "2") (V2SI "4")])
 
 (define_expand "mov<mode>"
Index: gcc/config/ia64/ia64.md
===================================================================
--- gcc/config/ia64/ia64.md	(revision 127652)
+++ gcc/config/ia64/ia64.md	(working copy)
@@ -385,8 +385,8 @@
 }
   [(set_attr "itanium_class" "ialu,ialu,long_i,ld,st,frfr,tofr,fmisc,fld,stf,frbr,tobr,frar_i,toar_i,frar_m,toar_m,frpr,topr")])
 
-(define_mode_macro MODE [BI QI HI SI DI SF DF XF TI])
-(define_mode_macro MODE_FOR_EXTEND [QI HI SI])
+(define_mode_iterator MODE [BI QI HI SI DI SF DF XF TI])
+(define_mode_iterator MODE_FOR_EXTEND [QI HI SI])
 
 (define_mode_attr output_a [
   (BI "ld1.a %0 = %1%P1")
Index: gcc/config/m68k/m68k.md
===================================================================
--- gcc/config/m68k/m68k.md	(revision 127652)
+++ gcc/config/m68k/m68k.md	(working copy)
@@ -138,7 +138,7 @@
 
 ;; Mode macros for floating point operations.
 ;; Valid floating point modes
-(define_mode_macro FP [SF DF (XF "TARGET_68881")])
+(define_mode_iterator FP [SF DF (XF "TARGET_68881")])
 ;; Mnemonic infix to round result
 (define_mode_attr round [(SF "%$") (DF "%&") (XF "")])
 ;; Mnemonic infix to round result for mul or div instruction
Index: gcc/config/rs6000/spe.md
===================================================================
--- gcc/config/rs6000/spe.md	(revision 127652)
+++ gcc/config/rs6000/spe.md	(working copy)
@@ -36,13 +36,13 @@
    ])
 
 ;; Modes using a 64-bit register.
-(define_mode_macro SPE64 [DF V4HI V2SF V1DI V2SI])
+(define_mode_iterator SPE64 [DF V4HI V2SF V1DI V2SI])
 
 ;; Likewise, but allow TFmode (two registers) as well.
-(define_mode_macro SPE64TF [DF V4HI V2SF V1DI V2SI TF])
+(define_mode_iterator SPE64TF [DF V4HI V2SF V1DI V2SI TF])
 
 ;; DImode and TImode.
-(define_mode_macro DITI [DI TI])
+(define_mode_iterator DITI [DI TI])
 
 (define_insn "*negsf2_gpr"
   [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
Index: gcc/config/rs6000/altivec.md
===================================================================
--- gcc/config/rs6000/altivec.md	(revision 127652)
+++ gcc/config/rs6000/altivec.md	(working copy)
@@ -162,13 +162,13 @@
   ])
 
 ;; Vec int modes
-(define_mode_macro VI [V4SI V8HI V16QI])
+(define_mode_iterator VI [V4SI V8HI V16QI])
 ;; Short vec in modes
-(define_mode_macro VIshort [V8HI V16QI])
+(define_mode_iterator VIshort [V8HI V16QI])
 ;; Vec float modes
-(define_mode_macro VF [V4SF])
-;; Vec modes, pity mode macros are not composable
-(define_mode_macro V [V4SI V8HI V16QI V4SF])
+(define_mode_iterator VF [V4SF])
+;; Vec modes, pity mode iterators are not composable
+(define_mode_iterator V [V4SI V8HI V16QI V4SF])
 
 (define_mode_attr VI_char [(V4SI "w") (V8HI "h") (V16QI "b")])
 
Index: gcc/config/rs6000/sync.md
===================================================================
--- gcc/config/rs6000/sync.md	(revision 127652)
+++ gcc/config/rs6000/sync.md	(working copy)
@@ -21,7 +21,7 @@
 (define_mode_attr larx [(SI "lwarx") (DI "ldarx")])
 (define_mode_attr stcx [(SI "stwcx.") (DI "stdcx.")])
 
-(define_code_macro FETCHOP [plus minus ior xor and])
+(define_code_iterator FETCHOP [plus minus ior xor and])
 (define_code_attr fetchop_name
   [(plus "add") (minus "sub") (ior "ior") (xor "xor") (and "and")])
 (define_code_attr fetchop_pred
Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md	(revision 127652)
+++ gcc/config/rs6000/rs6000.md	(working copy)
@@ -176,30 +176,30 @@
 (include "darwin.md")
 
 
-;; Mode macros
+;; Mode iterators
 
-; This mode macro allows :GPR to be used to indicate the allowable size
+; This mode iterator allows :GPR to be used to indicate the allowable size
 ; of whole values in GPRs.
-(define_mode_macro GPR [SI (DI "TARGET_POWERPC64")])
+(define_mode_iterator GPR [SI (DI "TARGET_POWERPC64")])
 
 ; Any supported integer mode.
-(define_mode_macro INT [QI HI SI DI TI])
+(define_mode_iterator INT [QI HI SI DI TI])
 
 ; Any supported integer mode that fits in one register.
-(define_mode_macro INT1 [QI HI SI (DI "TARGET_POWERPC64")])
+(define_mode_iterator INT1 [QI HI SI (DI "TARGET_POWERPC64")])
 
 ; extend modes for DImode
-(define_mode_macro QHSI [QI HI SI])
+(define_mode_iterator QHSI [QI HI SI])
 
 ; SImode or DImode, even if DImode doesn't fit in GPRs.
-(define_mode_macro SDI [SI DI])
+(define_mode_iterator SDI [SI DI])
 
 ; The size of a pointer.  Also, the size of the value that a record-condition
 ; (one with a '.') will compare.
-(define_mode_macro P [(SI "TARGET_32BIT") (DI "TARGET_64BIT")])
+(define_mode_iterator P [(SI "TARGET_32BIT") (DI "TARGET_64BIT")])
 
 ; Any hardware-supported floating-point mode
-(define_mode_macro FP [(SF "TARGET_HARD_FLOAT")
+(define_mode_iterator FP [(SF "TARGET_HARD_FLOAT")
   (DF "TARGET_HARD_FLOAT && (TARGET_FPRS || TARGET_E500_DOUBLE)")
   (TF "!TARGET_IEEEQUAD
    && TARGET_HARD_FLOAT
Index: gcc/config/arm/vec-common.md
===================================================================
--- gcc/config/arm/vec-common.md	(revision 127652)
+++ gcc/config/arm/vec-common.md	(working copy)
@@ -21,16 +21,16 @@
 ;; Vector Moves
 
 ;; All integer and float modes supported by Neon and IWMMXT.
-(define_mode_macro VALL [V2DI V2SI V4HI V8QI V2SF V4SI V8HI V16QI V4SF])
+(define_mode_iterator VALL [V2DI V2SI V4HI V8QI V2SF V4SI V8HI V16QI V4SF])
 
 ;; All integer and float modes supported by Neon and IWMMXT, except V2DI.
-(define_mode_macro VALLW [V2SI V4HI V8QI V2SF V4SI V8HI V16QI V4SF])
+(define_mode_iterator VALLW [V2SI V4HI V8QI V2SF V4SI V8HI V16QI V4SF])
 
 ;; All integer modes supported by Neon and IWMMXT
-(define_mode_macro VINT [V2DI V2SI V4HI V8QI V4SI V8HI V16QI])
+(define_mode_iterator VINT [V2DI V2SI V4HI V8QI V4SI V8HI V16QI])
 
 ;; All integer modes supported by Neon and IWMMXT, except V2DI
-(define_mode_macro VINTW [V2SI V4HI V8QI V4SI V8HI V16QI])
+(define_mode_iterator VINTW [V2SI V4HI V8QI V4SI V8HI V16QI])
 
 (define_expand "mov<mode>"
   [(set (match_operand:VALL 0 "nonimmediate_operand" "")
Index: gcc/config/arm/neon.md
===================================================================
--- gcc/config/arm/neon.md	(revision 127652)
+++ gcc/config/arm/neon.md	(working copy)
@@ -162,97 +162,97 @@
    (UNSPEC_VZIP2		204)])
 
 ;; Double-width vector modes.
-(define_mode_macro VD [V8QI V4HI V2SI V2SF])
+(define_mode_iterator VD [V8QI V4HI V2SI V2SF])
 
 ;; Double-width vector modes plus 64-bit elements.
-(define_mode_macro VDX [V8QI V4HI V2SI V2SF DI])
+(define_mode_iterator VDX [V8QI V4HI V2SI V2SF DI])
 
 ;; Same, without floating-point elements.
-(define_mode_macro VDI [V8QI V4HI V2SI])
+(define_mode_iterator VDI [V8QI V4HI V2SI])
 
 ;; Quad-width vector modes.
-(define_mode_macro VQ [V16QI V8HI V4SI V4SF])
+(define_mode_iterator VQ [V16QI V8HI V4SI V4SF])
 
 ;; Quad-width vector modes plus 64-bit elements.
-(define_mode_macro VQX [V16QI V8HI V4SI V4SF V2DI])
+(define_mode_iterator VQX [V16QI V8HI V4SI V4SF V2DI])
 
 ;; Same, without floating-point elements.
-(define_mode_macro VQI [V16QI V8HI V4SI])
+(define_mode_iterator VQI [V16QI V8HI V4SI])
 
 ;; Same, with TImode added, for moves.
-(define_mode_macro VQXMOV [V16QI V8HI V4SI V4SF V2DI TI])
+(define_mode_iterator VQXMOV [V16QI V8HI V4SI V4SF V2DI TI])
 
 ;; Opaque structure types wider than TImode.
-(define_mode_macro VSTRUCT [EI OI CI XI])
+(define_mode_iterator VSTRUCT [EI OI CI XI])
 
 ;; Number of instructions needed to load/store struct elements. FIXME!
 (define_mode_attr V_slen [(EI "2") (OI "2") (CI "3") (XI "4")])
 
 ;; Opaque structure types used in table lookups (except vtbl1/vtbx1).
-(define_mode_macro VTAB [TI EI OI])
+(define_mode_iterator VTAB [TI EI OI])
 
 ;; vtbl<n> suffix for above modes.
 (define_mode_attr VTAB_n [(TI "2") (EI "3") (OI "4")])
 
 ;; Widenable modes.
-(define_mode_macro VW [V8QI V4HI V2SI])
+(define_mode_iterator VW [V8QI V4HI V2SI])
 
 ;; Narrowable modes.
-(define_mode_macro VN [V8HI V4SI V2DI])
+(define_mode_iterator VN [V8HI V4SI V2DI])
 
 ;; All supported vector modes (except singleton DImode).
-(define_mode_macro VDQ [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF V2DI])
+(define_mode_iterator VDQ [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF V2DI])
 
 ;; All supported vector modes (except those with 64-bit integer elements).
-(define_mode_macro VDQW [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF])
+(define_mode_iterator VDQW [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF])
 
 ;; Supported integer vector modes (not 64 bit elements).
-(define_mode_macro VDQIW [V8QI V16QI V4HI V8HI V2SI V4SI])
+(define_mode_iterator VDQIW [V8QI V16QI V4HI V8HI V2SI V4SI])
 
 ;; Supported integer vector modes (not singleton DI)
-(define_mode_macro VDQI [V8QI V16QI V4HI V8HI V2SI V4SI V2DI])
+(define_mode_iterator VDQI [V8QI V16QI V4HI V8HI V2SI V4SI V2DI])
 
 ;; Vector modes, including 64-bit integer elements.
-(define_mode_macro VDQX [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF DI V2DI])
+(define_mode_iterator VDQX [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF DI V2DI])
 
 ;; Vector modes including 64-bit integer elements, but no floats.
-(define_mode_macro VDQIX [V8QI V16QI V4HI V8HI V2SI V4SI DI V2DI])
+(define_mode_iterator VDQIX [V8QI V16QI V4HI V8HI V2SI V4SI DI V2DI])
 
 ;; Vector modes for float->int conversions.
-(define_mode_macro VCVTF [V2SF V4SF])
+(define_mode_iterator VCVTF [V2SF V4SF])
 
 ;; Vector modes form int->float conversions.
-(define_mode_macro VCVTI [V2SI V4SI])
+(define_mode_iterator VCVTI [V2SI V4SI])
 
 ;; Vector modes for doubleword multiply-accumulate, etc. insns.
-(define_mode_macro VMD [V4HI V2SI V2SF])
+(define_mode_iterator VMD [V4HI V2SI V2SF])
 
 ;; Vector modes for quadword multiply-accumulate, etc. insns.
-(define_mode_macro VMQ [V8HI V4SI V4SF])
+(define_mode_iterator VMQ [V8HI V4SI V4SF])
 
 ;; Above modes combined.
-(define_mode_macro VMDQ [V4HI V2SI V2SF V8HI V4SI V4SF])
+(define_mode_iterator VMDQ [V4HI V2SI V2SF V8HI V4SI V4SF])
 
 ;; As VMD, but integer modes only.
-(define_mode_macro VMDI [V4HI V2SI])
+(define_mode_iterator VMDI [V4HI V2SI])
 
 ;; As VMQ, but integer modes only.
-(define_mode_macro VMQI [V8HI V4SI])
+(define_mode_iterator VMQI [V8HI V4SI])
 
 ;; Above modes combined.
-(define_mode_macro VMDQI [V4HI V2SI V8HI V4SI])
+(define_mode_iterator VMDQI [V4HI V2SI V8HI V4SI])
 
 ;; Modes with 8-bit and 16-bit elements.
-(define_mode_macro VX [V8QI V4HI V16QI V8HI])
+(define_mode_iterator VX [V8QI V4HI V16QI V8HI])
 
 ;; Modes with 8-bit elements.
-(define_mode_macro VE [V8QI V16QI])
+(define_mode_iterator VE [V8QI V16QI])
 
 ;; Modes with 64-bit elements only.
-(define_mode_macro V64 [DI V2DI])
+(define_mode_iterator V64 [DI V2DI])
 
 ;; Modes with 32-bit elements only.
-(define_mode_macro V32 [V2SI V2SF V4SI V4SF])
+(define_mode_iterator V32 [V2SI V2SF V4SI V4SF])
 
 ;; (Opposite) mode to convert to/from for above conversions.
 (define_mode_attr V_CVTTO [(V2SI "V2SF") (V2SF "V2SI")
@@ -394,10 +394,10 @@
                           (DI   "ti") (V2DI  "oi")])
 
 ;; Operations on two halves of a quadword vector.
-(define_code_macro vqh_ops [plus smin smax umin umax])
+(define_code_iterator vqh_ops [plus smin smax umin umax])
 
 ;; Same, without unsigned variants (for use with *SFmode pattern).
-(define_code_macro vqhs_ops [plus smin smax])
+(define_code_iterator vqhs_ops [plus smin smax])
 
 ;; Assembler mnemonics for above codes.
 (define_code_attr VQH_mnem [(plus "vadd") (smin "vmin") (smax "vmax")
Index: gcc/config/arm/iwmmxt.md
===================================================================
--- gcc/config/arm/iwmmxt.md	(revision 127652)
+++ gcc/config/arm/iwmmxt.md	(working copy)
@@ -20,10 +20,10 @@
 ;; <http://www.gnu.org/licenses/>.
 
 ;; Integer element sizes implemented by IWMMXT.
-(define_mode_macro VMMX [V2SI V4HI V8QI])
+(define_mode_iterator VMMX [V2SI V4HI V8QI])
 
 ;; Integer element sizes for shifts.
-(define_mode_macro VSHFT [V4HI V2SI DI])
+(define_mode_iterator VSHFT [V4HI V2SI DI])
 
 ;; Determine element size suffix from vector mode.
 (define_mode_attr MMX_char [(V8QI "b") (V4HI "h") (V2SI "w") (DI "d")])
Index: gcc/config/arm/arm.md
===================================================================
--- gcc/config/arm/arm.md	(revision 127652)
+++ gcc/config/arm/arm.md	(working copy)
@@ -309,12 +309,12 @@
 (define_attr "ce_count" "" (const_int 1))
 
 ;;---------------------------------------------------------------------------
-;; Mode macros
+;; Mode iterators
 
 ; A list of modes that are exactly 64 bits in size.  We use this to expand
 ; some splits that are the same for all modes when operating on ARM 
 ; registers.
-(define_mode_macro ANY64 [DI DF V8QI V4HI V2SI V2SF])
+(define_mode_iterator ANY64 [DI DF V8QI V4HI V2SI V2SF])
 
 ;;---------------------------------------------------------------------------
 ;; Predicates
Index: gcc/config/mips/mips-dsp.md
===================================================================
--- gcc/config/mips/mips-dsp.md	(revision 127652)
+++ gcc/config/mips/mips-dsp.md	(working copy)
@@ -6,18 +6,18 @@
    (CCDSP_CC_REGNUM	186)
    (CCDSP_EF_REGNUM	187)])
 
-;; This mode macro allows si, v2hi, v4qi for all possible modes in DSP ASE.
-(define_mode_macro DSP [(SI "TARGET_DSP")
-			(V2HI "TARGET_DSP")
-		 	(V4QI "TARGET_DSP")])
+;; This mode iterator allows si, v2hi, v4qi for all possible modes in DSP ASE.
+(define_mode_iterator DSP [(SI "TARGET_DSP")
+			   (V2HI "TARGET_DSP")
+		 	   (V4QI "TARGET_DSP")])
 
-;; This mode macro allows v2hi, v4qi for vector/SIMD data.
-(define_mode_macro DSPV [(V2HI "TARGET_DSP")
-			 (V4QI "TARGET_DSP")])
+;; This mode iterator allows v2hi, v4qi for vector/SIMD data.
+(define_mode_iterator DSPV [(V2HI "TARGET_DSP")
+			    (V4QI "TARGET_DSP")])
 
-;; This mode macro allows si, v2hi for Q31 and V2Q15 fixed-point data.
-(define_mode_macro DSPQ [(SI "TARGET_DSP")
-		         (V2HI "TARGET_DSP")])
+;; This mode iterator allows si, v2hi for Q31 and V2Q15 fixed-point data.
+(define_mode_iterator DSPQ [(SI "TARGET_DSP")
+			    (V2HI "TARGET_DSP")])
 
 ;; DSP instructions use q for fixed-point data, and u for integer in the infix.
 (define_mode_attr dspfmt1 [(SI "q") (V2HI "q") (V4QI "u")])
Index: gcc/config/mips/mips.md
===================================================================
--- gcc/config/mips/mips.md	(revision 127652)
+++ gcc/config/mips/mips.md	(working copy)
@@ -464,31 +464,31 @@
   [(set_attr "type" "multi")
    (set_attr "can_delay" "no")])
 
-;; This mode macro allows 32-bit and 64-bit GPR patterns to be generated
+;; This mode iterator allows 32-bit and 64-bit GPR patterns to be generated
 ;; from the same template.
-(define_mode_macro GPR [SI (DI "TARGET_64BIT")])
+(define_mode_iterator GPR [SI (DI "TARGET_64BIT")])
 
-;; This mode macro allows :P to be used for patterns that operate on
+;; This mode iterator allows :P to be used for patterns that operate on
 ;; pointer-sized quantities.  Exactly one of the two alternatives will match.
-(define_mode_macro P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
+(define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
 
-;; This mode macro allows :MOVECC to be used anywhere that a
+;; This mode iterator allows :MOVECC to be used anywhere that a
 ;; conditional-move-type condition is needed.
-(define_mode_macro MOVECC [SI (DI "TARGET_64BIT") (CC "TARGET_HARD_FLOAT")])
+(define_mode_iterator MOVECC [SI (DI "TARGET_64BIT") (CC "TARGET_HARD_FLOAT")])
 
-;; This mode macro allows the QI and HI extension patterns to be defined from
+;; This mode iterator allows the QI and HI extension patterns to be defined from
 ;; the same template.
-(define_mode_macro SHORT [QI HI])
+(define_mode_iterator SHORT [QI HI])
 
-;; This mode macro allows :ANYF to be used wherever a scalar or vector
+;; This mode iterator allows :ANYF to be used wherever a scalar or vector
 ;; floating-point mode is allowed.
-(define_mode_macro ANYF [(SF "TARGET_HARD_FLOAT")
-			 (DF "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT")
-			 (V2SF "TARGET_PAIRED_SINGLE_FLOAT")])
+(define_mode_iterator ANYF [(SF "TARGET_HARD_FLOAT")
+			    (DF "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT")
+			    (V2SF "TARGET_PAIRED_SINGLE_FLOAT")])
 
 ;; Like ANYF, but only applies to scalar modes.
-(define_mode_macro SCALARF [(SF "TARGET_HARD_FLOAT")
-			    (DF "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT")])
+(define_mode_iterator SCALARF [(SF "TARGET_HARD_FLOAT")
+			       (DF "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT")])
 
 ;; In GPR templates, a string like "<d>subu" will expand to "subu" in the
 ;; 32-bit version and "dsubu" in the 64-bit version.
@@ -545,26 +545,26 @@
 (define_mode_attr recip_condition
   [(SF "ISA_HAS_FP4") (DF "ISA_HAS_FP4") (V2SF "TARGET_SB1")])
 
-;; This code macro allows all branch instructions to be generated from
+;; This code iterator allows all branch instructions to be generated from
 ;; a single define_expand template.
-(define_code_macro any_cond [unordered ordered unlt unge uneq ltgt unle ungt
-			     eq ne gt ge lt le gtu geu ltu leu])
+(define_code_iterator any_cond [unordered ordered unlt unge uneq ltgt unle ungt
+			        eq ne gt ge lt le gtu geu ltu leu])
 
-;; This code macro allows signed and unsigned widening multiplications
+;; This code iterator allows signed and unsigned widening multiplications
 ;; to use the same template.
-(define_code_macro any_extend [sign_extend zero_extend])
+(define_code_iterator any_extend [sign_extend zero_extend])
 
-;; This code macro allows the three shift instructions to be generated
+;; This code iterator allows the three shift instructions to be generated
 ;; from the same template.
-(define_code_macro any_shift [ashift ashiftrt lshiftrt])
+(define_code_iterator any_shift [ashift ashiftrt lshiftrt])
 
-;; This code macro allows all native floating-point comparisons to be
+;; This code iterator allows all native floating-point comparisons to be
 ;; generated from the same template.
-(define_code_macro fcond [unordered uneq unlt unle eq lt le])
+(define_code_iterator fcond [unordered uneq unlt unle eq lt le])
 
-;; This code macro is used for comparisons that can be implemented
+;; This code iterator is used for comparisons that can be implemented
 ;; by swapping the operands.
-(define_code_macro swapped_fcond [ge gt unge ungt])
+(define_code_iterator swapped_fcond [ge gt unge ungt])
 
 ;; <u> expands to an empty string when doing a signed operation and
 ;; "u" when doing an unsigned operation.
Index: gcc/config/vax/vax.md
===================================================================
--- gcc/config/vax/vax.md	(revision 127652)
+++ gcc/config/vax/vax.md	(working copy)
@@ -42,11 +42,11 @@
 
 ;; Integer modes supported on VAX, with a mapping from machine mode
 ;; to mnemonic suffix.  DImode is always a special case.
-(define_mode_macro VAXint [QI HI SI])
+(define_mode_iterator VAXint [QI HI SI])
 (define_mode_attr  isfx [(QI "b") (HI "w") (SI "l")])
 
 ;; Similar for float modes supported on VAX.
-(define_mode_macro VAXfp [SF DF])
+(define_mode_iterator VAXfp [SF DF])
 (define_mode_attr  fsfx [(SF "f") (DF "%#")])
 
 ;; Some output patterns want integer immediates with a prefix...
@@ -1012,7 +1012,7 @@
   "jbr %l0")
 
 ;; Conditional jumps
-(define_code_macro any_cond [eq ne gt lt gtu ltu ge le geu leu])
+(define_code_iterator any_cond [eq ne gt lt gtu ltu ge le geu leu])
 
 (define_insn "b<code>"
   [(set (pc)
Index: gcc/config/bfin/bfin.md
===================================================================
--- gcc/config/bfin/bfin.md	(revision 127652)
+++ gcc/config/bfin/bfin.md	(working copy)
@@ -875,7 +875,7 @@
 
 ;; DImode logical operations
 
-(define_code_macro any_logical [and ior xor])
+(define_code_iterator any_logical [and ior xor])
 (define_code_attr optab [(and "and")
 			 (ior "ior")
 			 (xor "xor")])
@@ -3544,7 +3544,7 @@
   [(set_attr "type" "dsp32")])
 
 
-(define_code_macro s_or_u [sign_extend zero_extend])
+(define_code_iterator s_or_u [sign_extend zero_extend])
 (define_code_attr su_optab [(sign_extend "mul")
 			    (zero_extend "umul")])
 (define_code_attr su_modifier [(sign_extend "IS")

brgds, H-P


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