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PATCH: PR target/31385: gcc fails to find spill register for decimal arithmetic
- From: "H.J. Lu" <hjl at lucon dot org>
- To: gcc-patches at gcc dot gnu dot org
- Date: Sat, 18 Aug 2007 08:56:39 -0700
- Subject: PATCH: PR target/31385: gcc fails to find spill register for decimal arithmetic
Is there a particular reason that DFP isn't allowed in GPR on x86?
This patch works for me.
H.J.
---
2007-08-18 H.J. Lu <hongjiu.lu@intel.com>
PR target/31385
* config/i386/i386.h (VALID_DFP_MODE_P): New.
* config/i386/i386.c (ix86_hard_regno_mode_ok): Allow DFP in
GPR.
--- gcc/config/i386/i386.c.dfp 2007-08-18 06:39:42.000000000 -0700
+++ gcc/config/i386/i386.c 2007-08-18 08:47:40.000000000 -0700
@@ -20604,6 +20604,8 @@ ix86_hard_regno_mode_ok (int regno, enum
return 1;
else if (VALID_FP_MODE_P (mode))
return 1;
+ else if (VALID_DFP_MODE_P (mode))
+ return 1;
/* Lots of MMX code casts 8 byte vector modes to DImode. If we then go
on to use that value in smaller contexts, this can easily force a
pseudo to be allocated to GENERAL_REGS. Since this is no worse than
--- gcc/config/i386/i386.h.dfp 2007-08-18 06:39:42.000000000 -0700
+++ gcc/config/i386/i386.h 2007-08-18 08:45:09.000000000 -0700
@@ -1088,6 +1088,9 @@ do { \
place emms and femms instructions. */
#define UNITS_PER_SIMD_WORD (TARGET_SSE ? 16 : UNITS_PER_WORD)
+#define VALID_DFP_MODE_P(MODE) \
+ ((MODE) == SDmode || (MODE) == DDmode || (MODE) == TDmode)
+
#define VALID_FP_MODE_P(MODE) \
((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode \
|| (MODE) == SCmode || (MODE) == DCmode || (MODE) == XCmode) \