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Shrink size of df_mw_ref and df_ref
- From: Richard Sandiford <rsandifo at nildram dot co dot uk>
- To: gcc-patches at gcc dot gnu dot org
- Cc: rguenther at suse dot de
- Date: Fri, 29 Jun 2007 08:45:37 +0100
- Subject: Shrink size of df_mw_ref and df_ref
On #gcc yesterday, Richard Guenther noticed a way of shrinking the
df_mw_ref and df_ref structures. We have two enums side-by-side,
one currently 2 bits in size and one currently 12 bits. Treating them
as bitfields in df_mw_reg will save 32 bits on a 32-bit host and 64 bits
on a 64-bit host. The same is true for df_ref once regno is moved to be
with the other integer fields.
Bootstrapped & regression-tested on x86_64-linux-gnu. OK to install?
(Note that this patch applies on top of my earlier subreg one,
with the "loc" field already removed from df_mw_hardreg.)
Richard
2007-xx-xx Richard Sandiford <rsandifo@nildram.co.uk>
Richard Guenther <rguenther@suse.de>
gcc/
* df.h (df_mw_hardreg): Turn df_ref_type and df_ref_flags
into bitfields.
(df_ref): Likewise. Put regno with other integer fields.
Index: gcc/df.h
===================================================================
--- gcc/df.h 2007-06-28 23:29:20.000000000 +0100
+++ gcc/df.h 2007-06-29 00:04:32.000000000 +0100
@@ -312,8 +312,12 @@ struct dataflow
struct df_mw_hardreg
{
rtx mw_reg; /* The multiword hardreg. */
- enum df_ref_type type; /* Used to see if the ref is read or write. */
- enum df_ref_flags flags; /* Various flags. */
+ /* These two bitfields are intentially oversized, in the hope that
+ accesses to 16-bit fields will usually be quicker. */
+ ENUM_BITFIELD(df_ref_type) type : 16;
+ /* Used to see if the ref is read or write. */
+ ENUM_BITFIELD(df_ref_flags) flags : 16;
+ /* Various flags. */
unsigned int start_regno; /* First word of the multi word subreg. */
unsigned int end_regno; /* Last word of the multi word subreg. */
unsigned int mw_order; /* Same as df_ref.ref_order. */
@@ -342,7 +346,6 @@ struct df_insn_info
struct df_ref
{
rtx reg; /* The register referenced. */
- unsigned int regno; /* The register number referenced. */
basic_block bb; /* Basic block containing the instruction. */
/* Insn containing ref. This will be null if this is an artificial
@@ -357,8 +360,13 @@ struct df_ref
used to totally order the refs in an insn. */
unsigned int ref_order;
- enum df_ref_type type; /* Type of ref. */
- enum df_ref_flags flags; /* Various flags. */
+ unsigned int regno; /* The register number referenced. */
+ /* These two bitfields are intentially oversized, in the hope that
+ accesses to 16-bit fields will usually be quicker. */
+ ENUM_BITFIELD(df_ref_type) type : 16;
+ /* Type of ref. */
+ ENUM_BITFIELD(df_ref_flags) flags : 16;
+ /* Various flags. */
/* For each regno, there are three chains of refs, one for the uses,
the eq_uses and the defs. These chains go thru the refs