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Re: PATCH: Add SSE4.2 support - pcmpstr part
On Thu, May 31, 2007 at 02:37:59PM -0700, H. J. Lu wrote:
> On Thu, May 31, 2007 at 11:22:22PM +0200, Uros Bizjak wrote:
> > H. J. Lu wrote:
> >
> > >>Also, I see no reason, why we need two new CC modes. CCmode mode is
> > >>enough to use as a generic comparison mode.
> > >>
> > >
> > >The new CC modes are due to __builtin_ia32_pcmp?str?o128, which
> > >checks OF bit, and __builtin_ia32_pcmp?str?s128, which checks SF
> > >bit. Those aren't covered by the normal CC modes. There are no
> > >RTX codes for them. That is I invented 2 modes and reuse UNGT/UNLT.
> > >Besides you can't mix CC modes set by __builtin_ia32_pcmpistr?o128
> > >and __builtin_ia32_pcmpestr?o128 since they work on different things.
> > >
> >
> > This part is a bit tricky. You propose:
> >
> > >- Add CCZ to indicate that only the Zero flag is valid. */
> > >+ Add CCZ to indicate that only the Zero flag is valid.
> > >+
> > >+ Add CCPCMPESTR/CCPCMPISTR for pcmp[ei]str[im] instructions:
> > >+
> > >+ suffix rtx_code
> > >+ a GTU
> > >+ c LTU
> > >+ o UNGT OF == 1
> > >+ s UNLT SF == 1
> > >+ z EQ
> > >+ */
> >
> > But please note, that RTX code (that is present in the CC consumer)
> > produces correct Jcc/SETcc insn only in combination with the mode of the
> > CC register. We could re-write the table above according to existing
> > suffixes from put_condition_code():
> >
> > suffix RTX code mode
> > a GTU CC
> > c LTU CC
> > o EQ CCO (*)
> > s EQ CCS (*)
> > z EQ CCZ
> >
> > So, we currently have no mode that could generate "o" or "s" suffix, i.e
> > "seto" or "jo".
> >
>
> pcmp[ei]str[im] instructions set flag register in a non-standard
> way. That means CC mode set by them isn't compatible with CC mode
> set by any other insn. It is compatible only to itself. Also I
> don't think you can't reverse a CC mode set by pcmp[ei]str[im]
> instructions.
I meant to say "I don't think you can reverse a CC mode set by
pcmp[ei]str[im] instructions."
H.J.