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[PATCH, wwwdocs]: Mention support for __float128 operations on x86_64 target
- From: Uros Bizjak <ubizjak at gmail dot com>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Tue, 22 May 2007 22:19:38 +0200
- Subject: [PATCH, wwwdocs]: Mention support for __float128 operations on x86_64 target
Hello!
Attached patch adds a bullet to GCC 4.3 Release changes document, under
IA-32/x86-64 target specific improvement section.
OK for wwwdocs?
Uros.
Index: htdocs/gcc-4.3/changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.3/changes.html,v
retrieving revision 1.56
diff -u -p -r1.56 changes.html
--- htdocs/gcc-4.3/changes.html 21 May 2007 20:34:01 -0000 1.56
+++ htdocs/gcc-4.3/changes.html 22 May 2007 20:13:35 -0000
@@ -346,6 +346,19 @@
<li>A new set of options <code>-mpc32</code>, <code>-mpc64</code>
and <code>-mpc80</code> have been added to allow explicit control
of x87 floating point precision.</li>
+ <li>Support for <code>__float128</code> (TFmode) IEEE quad type is
+ available via soft-fp library on <code>x86_64</code> targets. The
+ support includes basic arithmetic operations (addition, subtraction,
+ negation, multiplication and division of <code>__float128</code>
+ values), full set of IEEE comparisons between <code>__float128</code>
+ values, conversions to and from <code>float</code>, <code>double</code>
+ and <code>long double</code> floating point types, as well as
+ conversions to and from <code>signed</code> or
+ <code>unsigned integer</code>, <code>signed</code> or
+ <code>unsigned long integer</code> and <code>signed</code> or
+ <code>unsigned quad integer</code> (TImode) types. Additionally, all
+ operations generate full set of IEEE exceptions and support full set
+ of IEEE rounding modes.</li>
</ul>
<h3>ARM</h3>